#include <linux/module.h>
#include <linux/irqchip.h>
#include <linux/irqdomain.h>
#include <linux/ioport.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <asm/exception.h>
#define PJ1_INT_SEL 0x10c
#define PJ4_INT_SEL 0x104
#define SEL_INT_PENDING (1 << 6)
#define SEL_INT_NUM_MASK 0x3f
#define MMP2_ICU_INT_ROUTE_PJ4_IRQ (1 << 5)
#define MMP2_ICU_INT_ROUTE_PJ4_FIQ (1 << 6)
unsigned int cascade_irq;
void __iomem *reg_status;
unsigned int conf_enable;
unsigned int conf_disable;
unsigned int clr_mfp_irq_base;
unsigned int clr_mfp_hwirq;
struct irq_domain *domain;
unsigned int conf_enable;
unsigned int conf_disable;
static void __iomem *mmp_icu_base;
static struct icu_chip_data icu_data[MAX_ICU_NR];
extern void mmp2_clear_pmic_int(void);
static void icu_mask_ack_irq(struct irq_data *d)
struct irq_domain *domain = d->domain;
struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;
hwirq = d->irq - data->virq_base;
if (data == &icu_data[0]) {
r = readl_relaxed(mmp_icu_base + (hwirq << 2));
writel_relaxed(r, mmp_icu_base + (hwirq << 2));
if ((data->virq_base == data->clr_mfp_irq_base)
&& (hwirq == data->clr_mfp_hwirq))
r = readl_relaxed(data->reg_mask) | (1 << hwirq);
writel_relaxed(r, data->reg_mask);
static void icu_mask_irq(struct irq_data *d)
struct irq_domain *domain = d->domain;