linux-imx

/*

 * Allwinner A20/A31 SoCs NMI IRQ chip driver.

 *

 * Carlo Caione <carlo.caione@gmail.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */

​

#define DRV_NAME    "sunxi-nmi"

#define pr_fmt(fmt) DRV_NAME ": " fmt

​

#include <linux/bitops.h>

#include <linux/device.h>

#include <linux/io.h>

#include <linux/irq.h>

#include <linux/interrupt.h>

#include <linux/irqdomain.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/irqchip.h>

#include <linux/irqchip/chained_irq.h>

​

#define SUNXI_NMI_SRC_TYPE_MASK 0x00000003

​

#define SUNXI_NMI_IRQ_BIT   BIT(0)

​

#define SUN6I_R_INTC_CTRL   0x0c

#define SUN6I_R_INTC_PENDING    0x10

#define SUN6I_R_INTC_ENABLE 0x40

​

/*

 * For deprecated sun6i-a31-sc-nmi compatible.

 * Registers are offset by 0x0c.

 */

#define SUN6I_R_INTC_NMI_OFFSET 0x0c

#define SUN6I_NMI_CTRL      (SUN6I_R_INTC_CTRL - SUN6I_R_INTC_NMI_OFFSET)

#define SUN6I_NMI_PENDING   (SUN6I_R_INTC_PENDING - SUN6I_R_INTC_NMI_OFFSET)

#define SUN6I_NMI_ENABLE    (SUN6I_R_INTC_ENABLE - SUN6I_R_INTC_NMI_OFFSET)

​

#define SUN7I_NMI_CTRL      0x00

#define SUN7I_NMI_PENDING   0x04

#define SUN7I_NMI_ENABLE    0x08

​

#define SUN9I_NMI_CTRL      0x00

#define SUN9I_NMI_ENABLE    0x04

#define SUN9I_NMI_PENDING   0x08

​

enum {

    SUNXI_SRC_TYPE_LEVEL_LOW = 0,

    SUNXI_SRC_TYPE_EDGE_FALLING,

    SUNXI_SRC_TYPE_LEVEL_HIGH,

    SUNXI_SRC_TYPE_EDGE_RISING,

};

​

struct sunxi_sc_nmi_reg_offs {

    u32 ctrl;

    u32 pend;

    u32 enable;

};

​