linux-imx

/*

 * Xtensa MX interrupt distributor

 *

 * Copyright (C) 2002 - 2013 Tensilica, Inc.

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 */

​

#include <linux/interrupt.h>

#include <linux/irqdomain.h>

#include <linux/irq.h>

#include <linux/irqchip.h>

#include <linux/of.h>

​

#include <asm/mxregs.h>

​

#define HW_IRQ_IPI_COUNT 2

#define HW_IRQ_MX_BASE 2

#define HW_IRQ_EXTERN_BASE 3

​

static DEFINE_PER_CPU(unsigned int, cached_irq_mask);

​

static int xtensa_mx_irq_map(struct irq_domain *d, unsigned int irq,

        irq_hw_number_t hw)

{

    if (hw < HW_IRQ_IPI_COUNT) {

        struct irq_chip *irq_chip = d->host_data;

        irq_set_chip_and_handler_name(irq, irq_chip,

                handle_percpu_irq, "ipi");

        irq_set_status_flags(irq, IRQ_LEVEL);

        return 0;

    }

    irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));

    return xtensa_irq_map(d, irq, hw);

}

​

/*

 * Device Tree IRQ specifier translation function which works with one or

 * two cell bindings. First cell value maps directly to the hwirq number.

 * Second cell if present specifies whether hwirq number is external (1) or

 * internal (0).

 */

static int xtensa_mx_irq_domain_xlate(struct irq_domain *d,

        struct device_node *ctrlr,

        const u32 *intspec, unsigned int intsize,

        unsigned long *out_hwirq, unsigned int *out_type)

{

    return xtensa_irq_domain_xlate(intspec, intsize,

            intspec[0], intspec[0] + HW_IRQ_EXTERN_BASE,

            out_hwirq, out_type);

}

​

static const struct irq_domain_ops xtensa_mx_irq_domain_ops = {

    .xlate = xtensa_mx_irq_domain_xlate,

    .map = xtensa_mx_irq_map,

};

​

void secondary_init_irq(void)

{

    __this_cpu_write(cached_irq_mask,

            XCHAL_INTTYPE_MASK_EXTERN_EDGE |