linux-imx

/*

 * Copyright 2012 Calxeda, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#include <linux/types.h>

#include <linux/err.h>

#include <linux/delay.h>

#include <linux/export.h>

#include <linux/io.h>

#include <linux/interrupt.h>

#include <linux/completion.h>

#include <linux/mutex.h>

#include <linux/notifier.h>

#include <linux/spinlock.h>

#include <linux/device.h>

#include <linux/amba/bus.h>

​

#include <linux/pl320-ipc.h>

​

#define IPCMxSOURCE(m)      ((m) * 0x40)

#define IPCMxDSET(m)        (((m) * 0x40) + 0x004)

#define IPCMxDCLEAR(m)      (((m) * 0x40) + 0x008)

#define IPCMxDSTATUS(m)     (((m) * 0x40) + 0x00C)

#define IPCMxMODE(m)        (((m) * 0x40) + 0x010)

#define IPCMxMSET(m)        (((m) * 0x40) + 0x014)

#define IPCMxMCLEAR(m)      (((m) * 0x40) + 0x018)

#define IPCMxMSTATUS(m)     (((m) * 0x40) + 0x01C)

#define IPCMxSEND(m)        (((m) * 0x40) + 0x020)

#define IPCMxDR(m, dr)      (((m) * 0x40) + ((dr) * 4) + 0x024)

​

#define IPCMMIS(irq)        (((irq) * 8) + 0x800)

#define IPCMRIS(irq)        (((irq) * 8) + 0x804)

​

#define MBOX_MASK(n)        (1 << (n))

#define IPC_TX_MBOX     1

#define IPC_RX_MBOX     2

​

#define CHAN_MASK(n)        (1 << (n))

#define A9_SOURCE       1

#define M3_SOURCE       0

​

static void __iomem *ipc_base;

static int ipc_irq;

static DEFINE_MUTEX(ipc_m1_lock);

static DECLARE_COMPLETION(ipc_completion);

static ATOMIC_NOTIFIER_HEAD(ipc_notifier);

​

static inline void set_destination(int source, int mbox)

{

    writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox));

    writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox));

}

​

static inline void clear_destination(int source, int mbox)

{

    writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox));

    writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox));

}

​

static void __ipc_send(int mbox, u32 *data)

{

    int i;

    for (i = 0; i < 7; i++)

        writel_relaxed(data[i], ipc_base + IPCMxDR(mbox, i));

    writel_relaxed(0x1, ipc_base + IPCMxSEND(mbox));

}

​

static u32 __ipc_rcv(int mbox, u32 *data)

{

    int i;

    for (i = 0; i < 7; i++)

        data[i] = readl_relaxed(ipc_base + IPCMxDR(mbox, i));

    return data[1];

}

​

/* blocking implmentation from the A9 side, not usuable in interrupts! */

int pl320_ipc_transmit(u32 *data)

{

    int ret;

​

    mutex_lock(&ipc_m1_lock);