linux-imx

/*

 * A V4L2 driver for OmniVision OV7670 cameras.

 *

 * Copyright 2006 One Laptop Per Child Association, Inc.  Written

 * by Jonathan Corbet with substantial inspiration from Mark

 * McClelland's ovcamchip code.

 *

 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>

 *

 * This file may be distributed under the terms of the GNU General

 * Public License, version 2.

 */

#include <linux/clk.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/slab.h>

#include <linux/i2c.h>

#include <linux/delay.h>

#include <linux/videodev2.h>

#include <linux/gpio.h>

#include <linux/gpio/consumer.h>

#include <media/v4l2-device.h>

#include <media/v4l2-event.h>

#include <media/v4l2-ctrls.h>

#include <media/v4l2-fwnode.h>

#include <media/v4l2-mediabus.h>

#include <media/v4l2-image-sizes.h>

#include <media/i2c/ov7670.h>

​

MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");

MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");

MODULE_LICENSE("GPL");

​

static bool debug;

module_param(debug, bool, 0644);

MODULE_PARM_DESC(debug, "Debug level (0-1)");

​

/*

 * The 7670 sits on i2c with ID 0x42

 */

#define OV7670_I2C_ADDR 0x42

​

#define PLL_FACTOR  4

​

/* Registers */

#define REG_GAIN    0x00    /* Gain lower 8 bits (rest in vref) */

#define REG_BLUE    0x01    /* blue gain */

#define REG_RED     0x02    /* red gain */

#define REG_VREF    0x03    /* Pieces of GAIN, VSTART, VSTOP */

#define REG_COM1    0x04    /* Control 1 */

#define  COM1_CCIR656     0x40  /* CCIR656 enable */

#define REG_BAVE    0x05    /* U/B Average level */

#define REG_GbAVE   0x06    /* Y/Gb Average level */

#define REG_AECHH   0x07    /* AEC MS 5 bits */

#define REG_RAVE    0x08    /* V/R Average level */

#define REG_COM2    0x09    /* Control 2 */

#define  COM2_SSLEEP      0x10  /* Soft sleep mode */

#define REG_PID     0x0a    /* Product ID MSB */

#define REG_VER     0x0b    /* Product ID LSB */

#define REG_COM3    0x0c    /* Control 3 */

#define  COM3_SWAP    0x40    /* Byte swap */

#define  COM3_SCALEEN     0x08    /* Enable scaling */

#define  COM3_DCWEN   0x04    /* Enable downsamp/crop/window */

#define REG_COM4    0x0d    /* Control 4 */

#define REG_COM5    0x0e    /* All "reserved" */

#define REG_COM6    0x0f    /* Control 6 */

#define REG_AECH    0x10    /* More bits of AEC value */

#define REG_CLKRC   0x11    /* Clocl control */

#define   CLK_EXT     0x40    /* Use external clock directly */

#define   CLK_SCALE   0x3f    /* Mask for internal clock scale */

#define REG_COM7    0x12    /* Control 7 */

#define   COM7_RESET      0x80    /* Register reset */

#define   COM7_FMT_MASK   0x38

#define   COM7_FMT_VGA    0x00

#define   COM7_FMT_CIF    0x20    /* CIF format */

#define   COM7_FMT_QVGA   0x10    /* QVGA format */

#define   COM7_FMT_QCIF   0x08    /* QCIF format */

#define   COM7_RGB    0x04    /* bits 0 and 2 - RGB format */

#define   COM7_YUV    0x00    /* YUV */

#define   COM7_BAYER      0x01    /* Bayer format */

#define   COM7_PBAYER     0x05    /* "Processed bayer" */

#define REG_COM8    0x13    /* Control 8 */

#define   COM8_FASTAEC    0x80    /* Enable fast AGC/AEC */

#define   COM8_AECSTEP    0x40    /* Unlimited AEC step size */

#define   COM8_BFILT      0x20    /* Band filter enable */

#define   COM8_AGC    0x04    /* Auto gain enable */

#define   COM8_AWB    0x02    /* White balance enable */

#define   COM8_AEC    0x01    /* Auto exposure enable */

#define REG_COM9    0x14    /* Control 9  - gain ceiling */

#define REG_COM10   0x15    /* Control 10 */

#define   COM10_HSYNC     0x40    /* HSYNC instead of HREF */

#define   COM10_PCLK_HB   0x20    /* Suppress PCLK on horiz blank */