Source
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Feature Integration Technology Inc. (aka Fintek) LPC CIR
*
* Copyright (C) 2011 Jarod Wilson <jarod@redhat.com>
*
* Special thanks to Fintek for providing hardware and spec sheets.
* This driver is based upon the nuvoton, ite and ene drivers for
* similar hardware.
*/
/* write val to config reg */
static inline void fintek_cr_write(struct fintek_dev *fintek, u8 val, u8 reg)
{
fit_dbg("%s: reg 0x%02x, val 0x%02x (ip/dp: %02x/%02x)",
__func__, reg, val, fintek->cr_ip, fintek->cr_dp);
outb(reg, fintek->cr_ip);
outb(val, fintek->cr_dp);
}
/* read val from config reg */
static inline u8 fintek_cr_read(struct fintek_dev *fintek, u8 reg)
{
u8 val;
outb(reg, fintek->cr_ip);
val = inb(fintek->cr_dp);
fit_dbg("%s: reg 0x%02x, val 0x%02x (ip/dp: %02x/%02x)",
__func__, reg, val, fintek->cr_ip, fintek->cr_dp);
return val;
}
/* update config register bit without changing other bits */
static inline void fintek_set_reg_bit(struct fintek_dev *fintek, u8 val, u8 reg)
{
u8 tmp = fintek_cr_read(fintek, reg) | val;
fintek_cr_write(fintek, tmp, reg);
}
/* clear config register bit without changing other bits */
static inline void fintek_clear_reg_bit(struct fintek_dev *fintek, u8 val, u8 reg)
{
u8 tmp = fintek_cr_read(fintek, reg) & ~val;
fintek_cr_write(fintek, tmp, reg);
}
/* enter config mode */
static inline void fintek_config_mode_enable(struct fintek_dev *fintek)
{
/* Enabling Config Mode explicitly requires writing 2x */
outb(CONFIG_REG_ENABLE, fintek->cr_ip);
outb(CONFIG_REG_ENABLE, fintek->cr_ip);
}
/* exit config mode */
static inline void fintek_config_mode_disable(struct fintek_dev *fintek)
{
outb(CONFIG_REG_DISABLE, fintek->cr_ip);
}
/*
* When you want to address a specific logical device, write its logical
* device number to GCR_LOGICAL_DEV_NO
*/
static inline void fintek_select_logical_dev(struct fintek_dev *fintek, u8 ldev)
{
fintek_cr_write(fintek, ldev, GCR_LOGICAL_DEV_NO);
}
/* write val to cir config register */
static inline void fintek_cir_reg_write(struct fintek_dev *fintek, u8 val, u8 offset)
{
outb(val, fintek->cir_addr + offset);
}
/* read val from cir config register */
static u8 fintek_cir_reg_read(struct fintek_dev *fintek, u8 offset)
{