linux-imx

/*

 * Copyright (c) 2015-2016 MediaTek Inc.

 * Author: Yong Wu <yong.wu@mediatek.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

#include <linux/clk.h>

#include <linux/component.h>

#include <linux/device.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_platform.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <soc/mediatek/smi.h>

#include <dt-bindings/memory/mt2701-larb-port.h>

​

/* mt8173 */

#define SMI_LARB_MMU_EN     0xf00

​

/* mt2701 */

#define REG_SMI_SECUR_CON_BASE      0x5c0

​

/* every register control 8 port, register offset 0x4 */

#define REG_SMI_SECUR_CON_OFFSET(id)    (((id) >> 3) << 2)

#define REG_SMI_SECUR_CON_ADDR(id)  \

    (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))

​

/*

 * every port have 4 bit to control, bit[port + 3] control virtual or physical,

 * bit[port + 2 : port + 1] control the domain, bit[port] control the security

 * or non-security.

 */

#define SMI_SECUR_CON_VAL_MSK(id)   (~(0xf << (((id) & 0x7) << 2)))

#define SMI_SECUR_CON_VAL_VIRT(id)  BIT((((id) & 0x7) << 2) + 3)

/* mt2701 domain should be set to 3 */

#define SMI_SECUR_CON_VAL_DOMAIN(id)    (0x3 << ((((id) & 0x7) << 2) + 1))

​

/* mt2712 */

#define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))

#define F_MMU_EN        BIT(0)

​

struct mtk_smi_larb_gen {

    bool need_larbid;

    int port_in_larb[MTK_LARB_NR_MAX + 1];

    void (*config_port)(struct device *);

};

​

struct mtk_smi {

    struct device           *dev;

    struct clk          *clk_apb, *clk_smi;

    struct clk          *clk_async; /*only needed by mt2701*/

    void __iomem            *smi_ao_base;

};