linux-imx

/*

 * wm8994-regmap.c  --  Register map data for WM8994 series devices

 *

 * Copyright 2011 Wolfson Microelectronics PLC.

 *

 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>

 *

 *  This program is free software; you can redistribute  it and/or modify it

 *  under  the terms of  the GNU General  Public License as published by the

 *  Free Software Foundation;  either version 2 of the  License, or (at your

 *  option) any later version.

 *

 */

​

#include <linux/mfd/wm8994/core.h>

#include <linux/mfd/wm8994/registers.h>

#include <linux/regmap.h>

#include <linux/device.h>

​

#include "wm8994.h"

​

static const struct reg_default wm1811_defaults[] = {

    { 0x0001, 0x0000 },    /* R1    - Power Management (1) */

    { 0x0002, 0x6000 },    /* R2    - Power Management (2) */

    { 0x0003, 0x0000 },    /* R3    - Power Management (3) */

    { 0x0004, 0x0000 },    /* R4    - Power Management (4) */

    { 0x0005, 0x0000 },    /* R5    - Power Management (5) */

    { 0x0006, 0x0000 },    /* R6    - Power Management (6) */

    { 0x0015, 0x0000 },    /* R21   - Input Mixer (1) */

    { 0x0018, 0x008B },    /* R24   - Left Line Input 1&2 Volume */

    { 0x0019, 0x008B },    /* R25   - Left Line Input 3&4 Volume */

    { 0x001A, 0x008B },    /* R26   - Right Line Input 1&2 Volume */

    { 0x001B, 0x008B },    /* R27   - Right Line Input 3&4 Volume */

    { 0x001C, 0x006D },    /* R28   - Left Output Volume */

    { 0x001D, 0x006D },    /* R29   - Right Output Volume */

    { 0x001E, 0x0066 },    /* R30   - Line Outputs Volume */

    { 0x001F, 0x0020 },    /* R31   - HPOUT2 Volume */

    { 0x0020, 0x0079 },    /* R32   - Left OPGA Volume */

    { 0x0021, 0x0079 },    /* R33   - Right OPGA Volume */

    { 0x0022, 0x0003 },    /* R34   - SPKMIXL Attenuation */

    { 0x0023, 0x0003 },    /* R35   - SPKMIXR Attenuation */

    { 0x0024, 0x0011 },    /* R36   - SPKOUT Mixers */

    { 0x0025, 0x0140 },    /* R37   - ClassD */

    { 0x0026, 0x0079 },    /* R38   - Speaker Volume Left */

    { 0x0027, 0x0079 },    /* R39   - Speaker Volume Right */

    { 0x0028, 0x0000 },    /* R40   - Input Mixer (2) */

    { 0x0029, 0x0000 },    /* R41   - Input Mixer (3) */

    { 0x002A, 0x0000 },    /* R42   - Input Mixer (4) */

    { 0x002B, 0x0000 },    /* R43   - Input Mixer (5) */

    { 0x002C, 0x0000 },    /* R44   - Input Mixer (6) */

    { 0x002D, 0x0000 },    /* R45   - Output Mixer (1) */

    { 0x002E, 0x0000 },    /* R46   - Output Mixer (2) */

    { 0x002F, 0x0000 },    /* R47   - Output Mixer (3) */

    { 0x0030, 0x0000 },    /* R48   - Output Mixer (4) */

    { 0x0031, 0x0000 },    /* R49   - Output Mixer (5) */

    { 0x0032, 0x0000 },    /* R50   - Output Mixer (6) */

    { 0x0033, 0x0000 },    /* R51   - HPOUT2 Mixer */

    { 0x0034, 0x0000 },    /* R52   - Line Mixer (1) */

    { 0x0035, 0x0000 },    /* R53   - Line Mixer (2) */

    { 0x0036, 0x0000 },    /* R54   - Speaker Mixer */

    { 0x0037, 0x0000 },    /* R55   - Additional Control */

    { 0x0038, 0x0000 },    /* R56   - AntiPOP (1) */

    { 0x0039, 0x0000 },    /* R57   - AntiPOP (2) */

    { 0x003B, 0x000D },    /* R59   - LDO 1 */

    { 0x003C, 0x0003 },    /* R60   - LDO 2 */

    { 0x003D, 0x0039 },    /* R61   - MICBIAS1 */

    { 0x003E, 0x0039 },    /* R62   - MICBIAS2 */

    { 0x004C, 0x1F25 },    /* R76   - Charge Pump (1) */

    { 0x004D, 0xAB19 },    /* R77   - Charge Pump (2) */

    { 0x0051, 0x0004 },    /* R81   - Class W (1) */

    { 0x0055, 0x054A },    /* R85   - DC Servo (2) */

    { 0x0059, 0x0000 },    /* R89   - DC Servo (4) */

    { 0x0060, 0x0000 },    /* R96   - Analogue HP (1) */

    { 0x00C5, 0x0000 },    /* R197  - Class D Test (5) */

    { 0x00D0, 0x7600 },    /* R208  - Mic Detect 1 */

    { 0x00D1, 0x007F },    /* R209  - Mic Detect 2 */

    { 0x0101, 0x8004 },    /* R257  - Control Interface */

    { 0x0200, 0x0000 },    /* R512  - AIF1 Clocking (1) */

    { 0x0201, 0x0000 },    /* R513  - AIF1 Clocking (2) */

    { 0x0204, 0x0000 },    /* R516  - AIF2 Clocking (1) */

    { 0x0205, 0x0000 },    /* R517  - AIF2 Clocking (2) */

    { 0x0208, 0x0000 },    /* R520  - Clocking (1) */

    { 0x0209, 0x0000 },    /* R521  - Clocking (2) */

    { 0x0210, 0x0083 },    /* R528  - AIF1 Rate */

    { 0x0211, 0x0083 },    /* R529  - AIF2 Rate */

    { 0x0220, 0x0000 },    /* R544  - FLL1 Control (1) */

    { 0x0221, 0x0000 },    /* R545  - FLL1 Control (2) */

    { 0x0222, 0x0000 },    /* R546  - FLL1 Control (3) */

    { 0x0223, 0x0000 },    /* R547  - FLL1 Control (4) */

    { 0x0224, 0x0C80 },    /* R548  - FLL1 Control (5) */

    { 0x0226, 0x0000 },    /* R550  - FLL1 EFS 1 */

    { 0x0227, 0x0006 },    /* R551  - FLL1 EFS 2 */