linux-imx

/*

 * Copyright (C) 2012 Stefan Roese <sr@denx.de>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */

​

#include <linux/device.h>

#include <linux/firmware.h>

#include <linux/module.h>

#include <linux/errno.h>

#include <linux/kernel.h>

#include <linux/spi/spi.h>

#include <linux/platform_device.h>

#include <linux/delay.h>

#include <asm/unaligned.h>

​

#define FIRMWARE_NAME   "lattice-ecp3.bit"

​

/*

 * The JTAG ID's of the supported FPGA's. The ID is 32bit wide

 * reversed as noted in the manual.

 */

#define ID_ECP3_17  0xc2088080

#define ID_ECP3_35  0xc2048080

​

/* FPGA commands */

#define FPGA_CMD_READ_ID    0x07    /* plus 24 bits */

#define FPGA_CMD_READ_STATUS    0x09    /* plus 24 bits */

#define FPGA_CMD_CLEAR      0x70

#define FPGA_CMD_REFRESH    0x71

#define FPGA_CMD_WRITE_EN   0x4a    /* plus 2 bits */

#define FPGA_CMD_WRITE_DIS  0x4f    /* plus 8 bits */

#define FPGA_CMD_WRITE_INC  0x41    /* plus 0 bits */

​

/*

 * The status register is 32bit revered, DONE is bit 17 from the TN1222.pdf

 * (LatticeECP3 Slave SPI Port User's Guide)

 */

#define FPGA_STATUS_DONE    0x00004000

#define FPGA_STATUS_CLEARED 0x00010000

​

#define FPGA_CLEAR_TIMEOUT  5000    /* max. 5000ms for FPGA clear */

#define FPGA_CLEAR_MSLEEP   10

#define FPGA_CLEAR_LOOP_COUNT   (FPGA_CLEAR_TIMEOUT / FPGA_CLEAR_MSLEEP)

​

struct fpga_data {

    struct completion fw_loaded;

};

​

struct ecp3_dev {

    u32 jedec_id;

    char *name;

};

​

static const struct ecp3_dev ecp3_dev[] = {

    {

        .jedec_id = ID_ECP3_17,

        .name = "Lattice ECP3-17",

    },

    {