linux-imx

/* SPDX-License-Identifier: GPL-2.0+ */

/*  FDDI network adapter driver for DEC FDDIcontroller 700/700-C devices.

 *

 *  Copyright (c) 2018  Maciej W. Rozycki

 *

 *  This program is free software; you can redistribute it and/or

 *  modify it under the terms of the GNU General Public License

 *  as published by the Free Software Foundation; either version

 *  2 of the License, or (at your option) any later version.

 *

 *  References:

 *

 *  Dave Sawyer & Phil Weeks & Frank Itkowsky,

 *  "DEC FDDIcontroller 700 Port Specification",

 *  Revision 1.1, Digital Equipment Corporation

 */

​

#include <linux/compiler.h>

#include <linux/if_fddi.h>

#include <linux/spinlock.h>

#include <linux/timer.h>

#include <linux/types.h>

​

/* IOmem register offsets. */

#define FZA_REG_BASE        0x100000    /* register base address */

#define FZA_REG_RESET       0x100200    /* reset, r/w */

#define FZA_REG_INT_EVENT   0x100400    /* interrupt event, r/w1c */

#define FZA_REG_STATUS      0x100402    /* status, r/o */

#define FZA_REG_INT_MASK    0x100404    /* interrupt mask, r/w */

#define FZA_REG_CONTROL_A   0x100500    /* control A, r/w1s */

#define FZA_REG_CONTROL_B   0x100502    /* control B, r/w */

​

/* Reset register constants.  Bits 1:0 are r/w, others are fixed at 0. */

#define FZA_RESET_DLU   0x0002  /* OR with INIT to blast flash memory */

#define FZA_RESET_INIT  0x0001  /* switch into the reset state */

#define FZA_RESET_CLR   0x0000  /* run self-test and return to work */

​

/* Interrupt event register constants.  All bits are r/w1c. */

#define FZA_EVENT_DLU_DONE  0x0800  /* flash memory write complete */

#define FZA_EVENT_FLUSH_TX  0x0400  /* transmit ring flush request */

#define FZA_EVENT_PM_PARITY_ERR 0x0200  /* onboard packet memory parity err */

#define FZA_EVENT_HB_PARITY_ERR 0x0100  /* host bus parity error */

#define FZA_EVENT_NXM_ERR   0x0080  /* non-existent memory access error;

                     * also raised for unaligned and

                     * unsupported partial-word accesses

                     */

#define FZA_EVENT_LINK_ST_CHG   0x0040  /* link status change */

#define FZA_EVENT_STATE_CHG 0x0020  /* adapter state change */

#define FZA_EVENT_UNS_POLL  0x0010  /* unsolicited event service request */

#define FZA_EVENT_CMD_DONE  0x0008  /* command done ack */

#define FZA_EVENT_SMT_TX_POLL   0x0004  /* SMT frame transmit request */

#define FZA_EVENT_RX_POLL   0x0002  /* receive request (packet avail.) */

#define FZA_EVENT_TX_DONE   0x0001  /* RMC transmit done ack */

​

/* Status register constants.  All bits are r/o. */

#define FZA_STATUS_DLU_SHIFT    0xc /* down line upgrade status bits */

#define FZA_STATUS_DLU_MASK 0x03

#define FZA_STATUS_LINK_SHIFT   0xb /* link status bits */

#define FZA_STATUS_LINK_MASK    0x01

#define FZA_STATUS_STATE_SHIFT  0x8 /* adapter state bits */

#define FZA_STATUS_STATE_MASK   0x07

#define FZA_STATUS_HALT_SHIFT   0x0 /* halt reason bits */

#define FZA_STATUS_HALT_MASK    0xff

#define FZA_STATUS_TEST_SHIFT   0x0 /* test failure bits */

#define FZA_STATUS_TEST_MASK    0xff

​

#define FZA_STATUS_GET_DLU(x)   (((x) >> FZA_STATUS_DLU_SHIFT) &    \

                 FZA_STATUS_DLU_MASK)

#define FZA_STATUS_GET_LINK(x)  (((x) >> FZA_STATUS_LINK_SHIFT) &   \

                 FZA_STATUS_LINK_MASK)

#define FZA_STATUS_GET_STATE(x) (((x) >> FZA_STATUS_STATE_SHIFT) &  \

                 FZA_STATUS_STATE_MASK)

#define FZA_STATUS_GET_HALT(x)  (((x) >> FZA_STATUS_HALT_SHIFT) &   \

                 FZA_STATUS_HALT_MASK)

#define FZA_STATUS_GET_TEST(x)  (((x) >> FZA_STATUS_TEST_SHIFT) &   \

                 FZA_STATUS_TEST_MASK)

​

#define FZA_DLU_FAILURE     0x0 /* DLU catastrophic error; brain dead */

#define FZA_DLU_ERROR       0x1 /* DLU error; old firmware intact */

#define FZA_DLU_SUCCESS     0x2 /* DLU OK; new firmware loaded */

​

#define FZA_LINK_OFF        0x0 /* link unavailable */

#define FZA_LINK_ON     0x1 /* link available */

​

#define FZA_STATE_RESET     0x0 /* resetting */

#define FZA_STATE_UNINITIALIZED 0x1 /* after a reset */

#define FZA_STATE_INITIALIZED   0x2 /* initialized */

#define FZA_STATE_RUNNING   0x3 /* running (link active) */

#define FZA_STATE_MAINTENANCE   0x4 /* running (link looped back) */

#define FZA_STATE_HALTED    0x5 /* halted (error condition) */

​

#define FZA_HALT_UNKNOWN    0x00    /* unknown reason */