linux-imx

/*

 *  FUJITSU Extended Socket Network Device driver

 *  Copyright (c) 2015 FUJITSU LIMITED

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program; if not, see <http://www.gnu.org/licenses/>.

 *

 * The full GNU General Public License is included in this distribution in

 * the file called "COPYING".

 *

 */

​

#ifndef FJES_REGS_H_

#define FJES_REGS_H_

​

#include <linux/bitops.h>

​

#define XSCT_DEVICE_REGISTER_SIZE 0x1000

​

/* register offset */

/* Information registers */

#define XSCT_OWNER_EPID     0x0000  /* Owner EPID */

#define XSCT_MAX_EP         0x0004  /* Maximum EP */

​

/* Device Control registers */

#define XSCT_DCTL           0x0010  /* Device Control */

​

/* Command Control registers */

#define XSCT_CR             0x0020  /* Command request */

#define XSCT_CS             0x0024  /* Command status */

#define XSCT_SHSTSAL        0x0028  /* Share status address Low */

#define XSCT_SHSTSAH        0x002C  /* Share status address High */

​

#define XSCT_REQBL          0x0034  /* Request Buffer length */

#define XSCT_REQBAL         0x0038  /* Request Buffer Address Low */

#define XSCT_REQBAH         0x003C  /* Request Buffer Address High */

​

#define XSCT_RESPBL         0x0044  /* Response Buffer Length */

#define XSCT_RESPBAL        0x0048  /* Response Buffer Address Low */

#define XSCT_RESPBAH        0x004C  /* Response Buffer Address High */

​

/* Interrupt Control registers */

#define XSCT_IS             0x0080  /* Interrupt status */

#define XSCT_IMS            0x0084  /* Interrupt mask set */

#define XSCT_IMC            0x0088  /* Interrupt mask clear */

#define XSCT_IG             0x008C  /* Interrupt generator */

#define XSCT_ICTL           0x0090  /* Interrupt control */

​

/* register structure */

/* Information registers */

union REG_OWNER_EPID {

    struct {

        __le32 epid:16;

        __le32:16;