linux-imx

/*

 * i.MX6 OCOTP fusebox driver

 *

 * Copyright (c) 2015 Pengutronix, Philipp Zabel <p.zabel@pengutronix.de>

 *

 * Based on the barebox ocotp driver,

 * Copyright (c) 2010 Baruch Siach <baruch@tkos.co.il>,

 *  Orex Computed Radiography

 *

 * Write support based on the fsl_otp driver,

 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2

 * as published by the Free Software Foundation.

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

​

#include <linux/clk.h>

#include <linux/device.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/nvmem-provider.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/delay.h>

​

#define IMX_OCOTP_OFFSET_B0W0       0x400 /* Offset from base address of the

                           * OTP Bank0 Word0

                           */

#define IMX_OCOTP_OFFSET_PER_WORD   0x10  /* Offset between the start addr

                           * of two consecutive OTP words.

                           */

​

#define IMX_OCOTP_ADDR_CTRL     0x0000

#define IMX_OCOTP_ADDR_CTRL_SET     0x0004

#define IMX_OCOTP_ADDR_CTRL_CLR     0x0008

#define IMX_OCOTP_ADDR_TIMING       0x0010

#define IMX_OCOTP_ADDR_DATA0        0x0020

#define IMX_OCOTP_ADDR_DATA1        0x0030

#define IMX_OCOTP_ADDR_DATA2        0x0040

#define IMX_OCOTP_ADDR_DATA3        0x0050

​

#define IMX_OCOTP_BM_CTRL_ADDR      0x0000007F

#define IMX_OCOTP_BM_CTRL_BUSY      0x00000100

#define IMX_OCOTP_BM_CTRL_ERROR     0x00000200

#define IMX_OCOTP_BM_CTRL_REL_SHADOWS   0x00000400

​

#define DEF_RELAX           20  /* > 16.5ns */

#define DEF_FSOURCE         1001    /* > 1000 ns */

#define DEF_STROBE_PROG         10000   /* IPG clocks */

#define IMX_OCOTP_WR_UNLOCK     0x3E770000

#define IMX_OCOTP_READ_LOCKED_VAL   0xBADABADA

​

static DEFINE_MUTEX(ocotp_mutex);

​

struct ocotp_priv {

    struct device *dev;

    struct clk *clk;

    void __iomem *base;

    const struct ocotp_params *params;

    struct nvmem_config *config;

};

​

struct ocotp_params {

    unsigned int nregs;

    unsigned int bank_address_words;

    void (*set_timing)(struct ocotp_priv *priv);

};

​

static int imx_ocotp_wait_for_busy(void __iomem *base, u32 flags)

{

    int count;

    u32 c, mask;

​

    mask = IMX_OCOTP_BM_CTRL_BUSY | IMX_OCOTP_BM_CTRL_ERROR | flags;

​

    for (count = 10000; count >= 0; count--) {

        c = readl(base + IMX_OCOTP_ADDR_CTRL);

        if (!(c & mask))

            break;

        cpu_relax();

    }

​

    if (count < 0) {

        /* HW_OCOTP_CTRL[ERROR] will be set under the following

         * conditions:

         * - A write is performed to a shadow register during a shadow