linux-imx

/*

 * Freescale MXS On-Chip OTP driver

 *

 * Copyright (C) 2015 Stefan Wahren <stefan.wahren@i2se.com>

 *

 * Based on the driver from Huang Shijie and Christoph G. Baumann

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */

#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/device.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/nvmem-provider.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/stmp_device.h>

​

/* OCOTP registers and bits */

​

#define BM_OCOTP_CTRL_RD_BANK_OPEN  BIT(12)

#define BM_OCOTP_CTRL_ERROR     BIT(9)

#define BM_OCOTP_CTRL_BUSY      BIT(8)

​

#define OCOTP_TIMEOUT       10000

#define OCOTP_DATA_OFFSET   0x20

​

struct mxs_ocotp {

    struct clk *clk;

    void __iomem *base;

    struct nvmem_device *nvmem;

};

​

static int mxs_ocotp_wait(struct mxs_ocotp *otp)

{

    int timeout = OCOTP_TIMEOUT;

    unsigned int status = 0;

​

    while (timeout--) {

        status = readl(otp->base);

​

        if (!(status & (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)))

            break;

​

        cpu_relax();

    }

​

    if (status & BM_OCOTP_CTRL_BUSY)

        return -EBUSY;

    else if (status & BM_OCOTP_CTRL_ERROR)

        return -EIO;

​

    return 0;

}

​

static int mxs_ocotp_read(void *context, unsigned int offset,

              void *val, size_t bytes)

{

    struct mxs_ocotp *otp = context;

    u32 *buf = val;

    int ret;

​

    ret = clk_enable(otp->clk);

    if (ret)

        return ret;

​

    writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR);

​

    ret = mxs_ocotp_wait(otp);

    if (ret)

        goto disable_clk;

​

    /* open OCOTP banks for read */

    writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET);

​

    /* approximately wait 33 hclk cycles */

    udelay(1);

​

    ret = mxs_ocotp_wait(otp);

    if (ret)