linux-imx

/* 

 *    Private structs/constants for PARISC IOSAPIC support

 *

 *    Copyright (C) 2000 Hewlett Packard (Grant Grundler)

 *    Copyright (C) 2000,2003 Grant Grundler (grundler at parisc-linux.org)

 *    Copyright (C) 2002 Matthew Wilcox (willy at parisc-linux.org)

 *

 *

 *    This program is free software; you can redistribute it and/or modify

 *    it under the terms of the GNU General Public License as published by

 *    the Free Software Foundation; either version 2 of the License, or

 *    (at your option) any later version.

 *

 *    This program is distributed in the hope that it will be useful,

 *    but WITHOUT ANY WARRANTY; without even the implied warranty of

 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *    GNU General Public License for more details.

 *

 *    You should have received a copy of the GNU General Public License

 *    along with this program; if not, write to the Free Software

 *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

​

/*

** This file is private to iosapic driver.

** If stuff needs to be used by another driver, move it to a common file.

**

** WARNING: fields most data structures here are ordered to make sure

**          they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)

*/

​

​

/*

** Interrupt Routing Stuff

** -----------------------

** The interrupt routing table consists of entries derived from

** MP Specification Draft 1.5. There is one interrupt routing 

** table per cell.  N- and L-class consist of a single cell.

*/

struct irt_entry {

​

    /* Entry Type 139 identifies an I/O SAPIC interrupt entry */

    u8 entry_type;

​

    /* Entry Length 16 indicates entry is 16 bytes long */

    u8 entry_length;

​

    /* 

    ** Interrupt Type of 0 indicates a vectored interrupt, 

    ** all other values are reserved 

    */

    u8 interrupt_type;

​

    /* 

    ** PO and EL

    ** Polarity of SAPIC I/O input signals: 

    **    00 = Reserved 

    **    01 = Active high 

    **    10 = Reserved 

    **    11 = Active low 

    ** Trigger mode of SAPIC I/O input signals: 

    **    00 = Reserved 

    **    01 = Edge-triggered 

    **    10 = Reserved 

    **    11 = Level-triggered

    */

    u8 polarity_trigger;

​

    /* 

    ** IRQ and DEVNO

    ** irq identifies PCI interrupt signal where

    **    0x0 corresponds to INT_A#, 

    **    0x1 corresponds to INT_B#, 

    **    0x2 corresponds to INT_C# 

    **    0x3 corresponds to INT_D# 

    ** PCI device number where interrupt originates 

    */

    u8 src_bus_irq_devno;

​

    /* Source Bus ID identifies the bus where interrupt signal comes from */

    u8 src_bus_id;

​

    /* 

    ** Segment ID is unique across a protection domain and

    ** identifies a segment of PCI buses (reserved in 

    ** MP Specification Draft 1.5) 

    */

    u8 src_seg_id;

​

    /* 

    ** Destination I/O SAPIC INTIN# identifies the INTIN n pin 

    ** to which the signal is connected