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/* * ARM performance counter support. * * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com> * * This code is based on the sparc64 perf event code, which is in turn based * on the x86 code. */static DEFINE_PER_CPU(struct arm_pmu *, cpu_armpmu);static DEFINE_PER_CPU(int, cpu_irq);static inline u64 arm_pmu_event_max_period(struct perf_event *event){ if (event->hw.flags & ARMPMU_EVT_64BIT) return GENMASK_ULL(63, 0); else return GENMASK_ULL(31, 0);}static intarmpmu_map_cache_event(const unsigned (*cache_map) [PERF_COUNT_HW_CACHE_MAX] [PERF_COUNT_HW_CACHE_OP_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX], u64 config){ unsigned int cache_type, cache_op, cache_result, ret; cache_type = (config >> 0) & 0xff; if (cache_type >= PERF_COUNT_HW_CACHE_MAX) return -EINVAL; cache_op = (config >> 8) & 0xff; if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) return -EINVAL; cache_result = (config >> 16) & 0xff; if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) return -EINVAL; if (!cache_map) return -ENOENT; ret = (int)(*cache_map)[cache_type][cache_op][cache_result]; if (ret == CACHE_OP_UNSUPPORTED) return -ENOENT; return ret;}static intarmpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config){ int mapping; if (config >= PERF_COUNT_HW_MAX) return -EINVAL; if (!event_map) return -ENOENT; mapping = (*event_map)[config]; return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;}static intarmpmu_map_raw_event(u32 raw_event_mask, u64 config){ return (int)(config & raw_event_mask);}int