linux-imx

/* Copyright (C) 2016 Broadcom Corporation

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * This file contains the Northstar2 IOMUX driver that supports group

 * based PINMUX configuration. The PWM is functional only when the

 * corresponding mfio pin group is selected as gpio.

 */

​

#include <linux/err.h>

#include <linux/io.h>

#include <linux/of.h>

#include <linux/pinctrl/pinconf.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <linux/pinctrl/pinctrl.h>

#include <linux/pinctrl/pinmux.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

​

#include "../core.h"

#include "../pinctrl-utils.h"

​

#define NS2_NUM_IOMUX           19

#define NS2_NUM_PWM_MUX         4

​

#define NS2_PIN_MUX_BASE0       0x00

#define NS2_PIN_MUX_BASE1       0x01

#define NS2_PIN_CONF_BASE       0x02

#define NS2_MUX_PAD_FUNC1_OFFSET    0x04

​

#define NS2_PIN_SRC_MASK        0x01

#define NS2_PIN_PULL_MASK       0x03

#define NS2_PIN_DRIVE_STRENGTH_MASK 0x07

​

#define NS2_PIN_PULL_UP         0x01

#define NS2_PIN_PULL_DOWN       0x02

​

#define NS2_PIN_INPUT_EN_MASK       0x01

​

/*

 * Northstar2 IOMUX register description

 *

 * @base: base address number

 * @offset: register offset for mux configuration of a group

 * @shift: bit shift for mux configuration of a group

 * @mask: mask bits

 * @alt: alternate function to set to

 */

struct ns2_mux {

    unsigned int base;

    unsigned int offset;

    unsigned int shift;

    unsigned int mask;

    unsigned int alt;

};

​