linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * Intel Ice Lake PCH pinctrl/GPIO driver

 *

 * Copyright (C) 2018, Intel Corporation

 * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

 *      Mika Westerberg <mika.westerberg@linux.intel.com>

 */

​

#include <linux/acpi.h>

#include <linux/module.h>

#include <linux/platform_device.h>

​

#include <linux/pinctrl/pinctrl.h>

​

#include "pinctrl-intel.h"

​

#define ICL_PAD_OWN 0x020

#define ICL_PADCFGLOCK  0x080

#define ICL_HOSTSW_OWN  0x0b0

#define ICL_GPI_IE  0x110

​

#define ICL_GPP(r, s, e, g)             \

    {                       \

        .reg_num = (r),             \

        .base = (s),                \

        .size = ((e) - (s) + 1),        \

        .gpio_base = (g),           \

    }

​

#define ICL_NO_GPIO -1

​

#define ICL_COMMUNITY(b, s, e, g)           \

    {                       \

        .barno = (b),               \

        .padown_offset = ICL_PAD_OWN,       \

        .padcfglock_offset = ICL_PADCFGLOCK,    \

        .hostown_offset = ICL_HOSTSW_OWN,   \

        .ie_offset = ICL_GPI_IE,        \

        .pin_base = (s),            \

        .npins = ((e) - (s) + 1),       \

        .gpps = (g),                \

        .ngpps = ARRAY_SIZE(g),         \

    }

​

/* Ice Lake-LP */

static const struct pinctrl_pin_desc icllp_pins[] = {

    /* GPP_G */

    PINCTRL_PIN(0, "SD3_CMD"),

    PINCTRL_PIN(1, "SD3_D0"),

    PINCTRL_PIN(2, "SD3_D1"),

    PINCTRL_PIN(3, "SD3_D2"),

    PINCTRL_PIN(4, "SD3_D3"),

    PINCTRL_PIN(5, "SD3_CDB"),

    PINCTRL_PIN(6, "SD3_CLK"),

    PINCTRL_PIN(7, "SD3_WP"),

    /* GPP_B */

    PINCTRL_PIN(8, "CORE_VID_0"),

    PINCTRL_PIN(9, "CORE_VID_1"),

    PINCTRL_PIN(10, "VRALERTB"),

    PINCTRL_PIN(11, "CPU_GP_2"),

    PINCTRL_PIN(12, "CPU_GP_3"),

    PINCTRL_PIN(13, "ISH_I2C0_SDA"),