linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (c) 2018 MediaTek Inc.

 * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>

 *

 */

​

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/pinctrl/pinctrl.h>

#include <linux/regmap.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <dt-bindings/pinctrl/mt65xx.h>

​

#include "pinctrl-mtk-common.h"

#include "pinctrl-mtk-mt2712.h"

​

static const struct mtk_pin_spec_pupd_set_samereg mt2712_spec_pupd[] = {

    MTK_PIN_PUPD_SPEC_SR(18, 0xe50, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10),

    MTK_PIN_PUPD_SPEC_SR(20, 0xe50, 5, 4, 3),

    MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 15, 14, 13),

    MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6),

    MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 2, 1, 0),

​

    MTK_PIN_PUPD_SPEC_SR(30, 0xf30, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(31, 0xf30, 6, 5, 4),

    MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8),

    MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(34, 0xf40, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(35, 0xf40, 6, 5, 4),

    MTK_PIN_PUPD_SPEC_SR(36, 0xf40, 10, 9, 8),

    MTK_PIN_PUPD_SPEC_SR(37, 0xc40, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(38, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(39, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(40, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(41, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(42, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(43, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(44, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(45, 0xc60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(46, 0xc50, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(47, 0xda0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(48, 0xd90, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(49, 0xdf0, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(50, 0xdf0, 10, 9, 8),

    MTK_PIN_PUPD_SPEC_SR(51, 0xdf0, 6, 5, 4),

    MTK_PIN_PUPD_SPEC_SR(52, 0xdf0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(53, 0xd50, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(54, 0xd80, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(55, 0xe00, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(56, 0xd40, 2, 1, 0),

​

    MTK_PIN_PUPD_SPEC_SR(63, 0xc80, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(64, 0xdb0, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(65, 0xdb0, 6, 5, 4),

    MTK_PIN_PUPD_SPEC_SR(66, 0xdb0, 10, 9, 8),

    MTK_PIN_PUPD_SPEC_SR(67, 0xcd0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(68, 0xdb0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(69, 0xc90, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(70, 0xcc0, 2, 1, 0),

​

    MTK_PIN_PUPD_SPEC_SR(89, 0xce0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(90, 0xdd0, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(91, 0xdd0, 10, 9, 8),

    MTK_PIN_PUPD_SPEC_SR(92, 0xdd0, 6, 5, 4),

    MTK_PIN_PUPD_SPEC_SR(93, 0xdd0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(94, 0xd20, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(95, 0xcf0, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(96, 0xd30, 2, 1, 0),

​

    MTK_PIN_PUPD_SPEC_SR(135, 0xe50, 11, 10, 9),

    MTK_PIN_PUPD_SPEC_SR(136, 0xe50, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(137, 0xe70, 5, 4, 3),

    MTK_PIN_PUPD_SPEC_SR(138, 0xe70, 8, 7, 6),

    MTK_PIN_PUPD_SPEC_SR(139, 0xe70, 11, 10, 9),

    MTK_PIN_PUPD_SPEC_SR(140, 0xe70, 14, 13, 12),

    MTK_PIN_PUPD_SPEC_SR(141, 0xe60, 2, 1, 0),

    MTK_PIN_PUPD_SPEC_SR(142, 0xe60, 5, 4, 3)

};

​

static int mt2712_spec_pull_set(struct regmap *regmap,

                unsigned int pin,

                unsigned char align,

                bool isup,

                unsigned int r1r0)

{

    return mtk_pctrl_spec_pull_set_samereg(regmap, mt2712_spec_pupd,

        ARRAY_SIZE(mt2712_spec_pupd), pin, align, isup, r1r0);

}