linux-imx

/*

 * Pistachio SoC pinctrl driver

 *

 * Copyright (C) 2014 Imagination Technologies Ltd.

 * Copyright (C) 2014 Google, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 */

​

#include <linux/gpio/driver.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/irq.h>

#include <linux/of.h>

#include <linux/of_irq.h>

#include <linux/pinctrl/pinconf.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <linux/pinctrl/pinctrl.h>

#include <linux/pinctrl/pinmux.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/spinlock.h>

​

#include "pinctrl-utils.h"

​

#define PADS_SCHMITT_EN0        0x000

#define PADS_SCHMITT_EN_REG(pin)    (PADS_SCHMITT_EN0 + 0x4 * ((pin) / 32))

#define PADS_SCHMITT_EN_BIT(pin)    BIT((pin) % 32)

​

#define PADS_PU_PD0         0x040

#define PADS_PU_PD_REG(pin)     (PADS_PU_PD0 + 0x4 * ((pin) / 16))

#define PADS_PU_PD_SHIFT(pin)       (2 * ((pin) % 16))

#define PADS_PU_PD_MASK         0x3

#define PADS_PU_PD_HIGHZ        0x0

#define PADS_PU_PD_UP           0x1

#define PADS_PU_PD_DOWN         0x2

#define PADS_PU_PD_BUS          0x3

​

#define PADS_FUNCTION_SELECT0       0x0c0

#define PADS_FUNCTION_SELECT1       0x0c4

#define PADS_FUNCTION_SELECT2       0x0c8

#define PADS_SCENARIO_SELECT        0x0f8

​

#define PADS_SLEW_RATE0         0x100

#define PADS_SLEW_RATE_REG(pin)     (PADS_SLEW_RATE0 + 0x4 * ((pin) / 32))

#define PADS_SLEW_RATE_BIT(pin)     BIT((pin) % 32)

​

#define PADS_DRIVE_STRENGTH0        0x120

#define PADS_DRIVE_STRENGTH_REG(pin)                    \

    (PADS_DRIVE_STRENGTH0 + 0x4 * ((pin) / 16))

#define PADS_DRIVE_STRENGTH_SHIFT(pin)  (2 * ((pin) % 16))

#define PADS_DRIVE_STRENGTH_MASK    0x3

#define PADS_DRIVE_STRENGTH_2MA     0x0

#define PADS_DRIVE_STRENGTH_4MA     0x1

#define PADS_DRIVE_STRENGTH_8MA     0x2

#define PADS_DRIVE_STRENGTH_12MA    0x3

​

#define GPIO_BANK_BASE(bank)        (0x200 + 0x24 * (bank))

​

#define GPIO_BIT_EN         0x00

#define GPIO_OUTPUT_EN          0x04