linux-imx

/*

 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

​

#include <linux/gpio/driver.h>

#include <linux/interrupt.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_irq.h>

#include <linux/pinctrl/pinconf-generic.h>

#include <linux/pinctrl/pinconf.h>

#include <linux/pinctrl/pinmux.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>

#include <linux/slab.h>

#include <linux/types.h>

​

#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

​

#include "../core.h"

#include "../pinctrl-utils.h"

​

#define PMIC_GPIO_ADDRESS_RANGE         0x100

​

/* type and subtype registers base address offsets */

#define PMIC_GPIO_REG_TYPE          0x4

#define PMIC_GPIO_REG_SUBTYPE           0x5

​

/* GPIO peripheral type and subtype out_values */

#define PMIC_GPIO_TYPE              0x10

#define PMIC_GPIO_SUBTYPE_GPIO_4CH      0x1

#define PMIC_GPIO_SUBTYPE_GPIOC_4CH     0x5

#define PMIC_GPIO_SUBTYPE_GPIO_8CH      0x9

#define PMIC_GPIO_SUBTYPE_GPIOC_8CH     0xd

#define PMIC_GPIO_SUBTYPE_GPIO_LV       0x10

#define PMIC_GPIO_SUBTYPE_GPIO_MV       0x11

​

#define PMIC_MPP_REG_RT_STS         0x10

#define PMIC_MPP_REG_RT_STS_VAL_MASK        0x1

​

/* control register base address offsets */

#define PMIC_GPIO_REG_MODE_CTL          0x40

#define PMIC_GPIO_REG_DIG_VIN_CTL       0x41

#define PMIC_GPIO_REG_DIG_PULL_CTL      0x42

#define PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL  0x44

#define PMIC_GPIO_REG_DIG_IN_CTL        0x43

#define PMIC_GPIO_REG_DIG_OUT_CTL       0x45

#define PMIC_GPIO_REG_EN_CTL            0x46

#define PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL   0x4A

​

/* PMIC_GPIO_REG_MODE_CTL */

#define PMIC_GPIO_REG_MODE_VALUE_SHIFT      0x1

#define PMIC_GPIO_REG_MODE_FUNCTION_SHIFT   1

#define PMIC_GPIO_REG_MODE_FUNCTION_MASK    0x7