Source
* https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
// SPDX-License-Identifier: GPL-2.0
/*
* This file contains quirk handling code for PnP devices
* Some devices do not report all their resources, and need to have extra
* resources added. This is most easily accomplished at initialisation time
* when building up the resource structure for the first time.
*
* Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk>
* Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
* Bjorn Helgaas <bjorn.helgaas@hp.com>
*
* Heavily based on PCI quirks handling which is
*
* Copyright (c) 1999 Martin Mares <mj@ucw.cz>
*/
static void quirk_awe32_add_ports(struct pnp_dev *dev,
struct pnp_option *option,
unsigned int offset)
{
struct pnp_option *new_option;
new_option = kmalloc(sizeof(struct pnp_option), GFP_KERNEL);
if (!new_option) {
dev_err(&dev->dev, "couldn't add ioport region to option set "
"%d\n", pnp_option_set(option));
return;
}
*new_option = *option;
new_option->u.port.min += offset;
new_option->u.port.max += offset;
list_add(&new_option->list, &option->list);
dev_info(&dev->dev, "added ioport region %#llx-%#llx to set %d\n",
(unsigned long long) new_option->u.port.min,
(unsigned long long) new_option->u.port.max,
pnp_option_set(option));
}
static void quirk_awe32_resources(struct pnp_dev *dev)
{
struct pnp_option *option;
unsigned int set = ~0;
/*
* Add two extra ioport regions (at offset 0x400 and 0x800 from the
* one given) to every dependent option set.
*/
list_for_each_entry(option, &dev->options, list) {
if (pnp_option_is_dependent(option) &&
pnp_option_set(option) != set) {
set = pnp_option_set(option);
quirk_awe32_add_ports(dev, option, 0x800);