linux-imx

/*

 * Atmel AT91 SAM9 & SAMA5 SoCs reset code

 *

 * Copyright (C) 2007 Atmel Corporation.

 * Copyright (C) BitBox Ltd 2010

 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>

 * Copyright (C) 2014 Free Electrons

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */

​

#include <linux/clk.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of_address.h>

#include <linux/platform_device.h>

#include <linux/reboot.h>

​

#include <soc/at91/at91sam9_ddrsdr.h>

#include <soc/at91/at91sam9_sdramc.h>

​

#define AT91_RSTC_CR    0x00        /* Reset Controller Control Register */

#define AT91_RSTC_PROCRST   BIT(0)      /* Processor Reset */

#define AT91_RSTC_PERRST    BIT(2)      /* Peripheral Reset */

#define AT91_RSTC_EXTRST    BIT(3)      /* External Reset */

#define AT91_RSTC_KEY       (0xa5 << 24)    /* KEY Password */

​

#define AT91_RSTC_SR    0x04        /* Reset Controller Status Register */

#define AT91_RSTC_URSTS     BIT(0)      /* User Reset Status */

#define AT91_RSTC_RSTTYP    GENMASK(10, 8)  /* Reset Type */

#define AT91_RSTC_NRSTL     BIT(16)     /* NRST Pin Level */

#define AT91_RSTC_SRCMP     BIT(17)     /* Software Reset Command in Progress */

​

#define AT91_RSTC_MR    0x08        /* Reset Controller Mode Register */

#define AT91_RSTC_URSTEN    BIT(0)      /* User Reset Enable */

#define AT91_RSTC_URSTIEN   BIT(4)      /* User Reset Interrupt Enable */

#define AT91_RSTC_ERSTL     GENMASK(11, 8)  /* External Reset Length */

​

enum reset_type {

    RESET_TYPE_GENERAL  = 0,

    RESET_TYPE_WAKEUP   = 1,

    RESET_TYPE_WATCHDOG = 2,

    RESET_TYPE_SOFTWARE = 3,

    RESET_TYPE_USER     = 4,

    RESET_TYPE_CPU_FAIL = 6,

    RESET_TYPE_XTAL_FAIL    = 7,

    RESET_TYPE_ULP2     = 8,

};

​

static void __iomem *at91_ramc_base[2], *at91_rstc_base;

static struct clk *sclk;

​

/*

* unless the SDRAM is cleanly shutdown before we hit the

* reset register it can be left driving the data bus and

* killing the chance of a subsequent boot from NAND

*/

static int at91sam9260_restart(struct notifier_block *this, unsigned long mode,

                   void *cmd)

{

    asm volatile(