linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * simple driver for PWM (Pulse Width Modulator) controller

 *

 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>

 */

​

#include <linux/bitfield.h>

#include <linux/bitops.h>

#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/pwm.h>

#include <linux/slab.h>

​

#define MX3_PWMCR           0x00    /* PWM Control Register */

#define MX3_PWMSR           0x04    /* PWM Status Register */

#define MX3_PWMSAR          0x0C    /* PWM Sample Register */

#define MX3_PWMPR           0x10    /* PWM Period Register */

​

#define MX3_PWMCR_FWM           GENMASK(27, 26)

#define MX3_PWMCR_STOPEN        BIT(25)

#define MX3_PWMCR_DOZEN         BIT(24)

#define MX3_PWMCR_WAITEN        BIT(23)

#define MX3_PWMCR_DBGEN         BIT(22)

#define MX3_PWMCR_BCTR          BIT(21)

#define MX3_PWMCR_HCTR          BIT(20)

​

#define MX3_PWMCR_POUTC         GENMASK(19, 18)

#define MX3_PWMCR_POUTC_NORMAL      0

#define MX3_PWMCR_POUTC_INVERTED    1

#define MX3_PWMCR_POUTC_OFF     2

​

#define MX3_PWMCR_CLKSRC        GENMASK(17, 16)

#define MX3_PWMCR_CLKSRC_OFF        0

#define MX3_PWMCR_CLKSRC_IPG        1

#define MX3_PWMCR_CLKSRC_IPG_HIGH   2

#define MX3_PWMCR_CLKSRC_IPG_32K    3

​

#define MX3_PWMCR_PRESCALER     GENMASK(15, 4)

​

#define MX3_PWMCR_SWR           BIT(3)

​

#define MX3_PWMCR_REPEAT        GENMASK(2, 1)

#define MX3_PWMCR_REPEAT_1X     0

#define MX3_PWMCR_REPEAT_2X     1

#define MX3_PWMCR_REPEAT_4X     2

#define MX3_PWMCR_REPEAT_8X     3

​

#define MX3_PWMCR_EN            BIT(0)

​

#define MX3_PWMSR_FWE           BIT(6)

#define MX3_PWMSR_CMP           BIT(5)

#define MX3_PWMSR_ROV           BIT(4)

#define MX3_PWMSR_FE            BIT(3)

​

#define MX3_PWMSR_FIFOAV        GENMASK(2, 0)