Source
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static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
/*
* Maxim MAX77620 Regulator driver
*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
* Laxman Dewangan <ldewangan@nvidia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
/* Power Mode */
/* SD Slew Rate */
enum max77620_regulators {
MAX77620_REGULATOR_ID_SD0,
MAX77620_REGULATOR_ID_SD1,
MAX77620_REGULATOR_ID_SD2,
MAX77620_REGULATOR_ID_SD3,
MAX77620_REGULATOR_ID_SD4,
MAX77620_REGULATOR_ID_LDO0,
MAX77620_REGULATOR_ID_LDO1,
MAX77620_REGULATOR_ID_LDO2,
MAX77620_REGULATOR_ID_LDO3,
MAX77620_REGULATOR_ID_LDO4,
MAX77620_REGULATOR_ID_LDO5,
MAX77620_REGULATOR_ID_LDO6,
MAX77620_REGULATOR_ID_LDO7,
MAX77620_REGULATOR_ID_LDO8,
MAX77620_NUM_REGS,
};
/* Regulator types */
enum max77620_regulator_type {
MAX77620_REGULATOR_TYPE_SD,
MAX77620_REGULATOR_TYPE_LDO_N,
MAX77620_REGULATOR_TYPE_LDO_P,
};
struct max77620_regulator_info {
u8 type;
u8 fps_addr;
u8 volt_addr;
u8 cfg_addr;
u8 power_mode_mask;
u8 power_mode_shift;
u8 remote_sense_addr;
u8 remote_sense_mask;
struct regulator_desc desc;
};
struct max77620_regulator_pdata {
int active_fps_src;
int active_fps_pd_slot;
int active_fps_pu_slot;
int suspend_fps_src;
int suspend_fps_pd_slot;
int suspend_fps_pu_slot;
int current_mode;
int power_ok;
int ramp_rate_setting;
};
struct max77620_regulator {
struct device *dev;
struct regmap *rmap;
struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
int enable_power_mode[MAX77620_NUM_REGS];