linux-imx

/*

 * tps51632-regulator.c -- TI TPS51632

 *

 * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless

 * Controller with serial VID control and DVFS.

 *

 * Copyright (c) 2012, NVIDIA Corporation.

 *

 * Author: Laxman Dewangan <ldewangan@nvidia.com>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,

 * whether express or implied; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA

 * 02111-1307, USA

 */

​

#include <linux/err.h>

#include <linux/i2c.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>

#include <linux/regulator/driver.h>

#include <linux/regulator/machine.h>

#include <linux/regulator/of_regulator.h>

#include <linux/regulator/tps51632-regulator.h>

#include <linux/slab.h>

​

/* Register definitions */

#define TPS51632_VOLTAGE_SELECT_REG     0x0

#define TPS51632_VOLTAGE_BASE_REG       0x1

#define TPS51632_OFFSET_REG         0x2

#define TPS51632_IMON_REG           0x3

#define TPS51632_VMAX_REG           0x4

#define TPS51632_DVFS_CONTROL_REG       0x5

#define TPS51632_POWER_STATE_REG        0x6

#define TPS51632_SLEW_REGS          0x7

#define TPS51632_FAULT_REG          0x14

​

#define TPS51632_MAX_REG            0x15

​

#define TPS51632_VOUT_MASK          0x7F

#define TPS51632_VOUT_OFFSET_MASK       0x1F

#define TPS51632_VMAX_MASK          0x7F

#define TPS51632_VMAX_LOCK          0x80

​

/* TPS51632_DVFS_CONTROL_REG */

#define TPS51632_DVFS_PWMEN         0x1

#define TPS51632_DVFS_STEP_20           0x2

#define TPS51632_DVFS_VMAX_PG           0x4

#define TPS51632_DVFS_PWMRST            0x8

#define TPS51632_DVFS_OCA_EN            0x10

#define TPS51632_DVFS_FCCM          0x20

​

/* TPS51632_POWER_STATE_REG */

#define TPS51632_POWER_STATE_MASK       0x03

#define TPS51632_POWER_STATE_MULTI_PHASE_CCM    0x0

#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM   0x1

#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM   0x2

​

#define TPS51632_MIN_VOLTAGE            500000

#define TPS51632_MAX_VOLTAGE            1520000

#define TPS51632_VOLTAGE_STEP_10mV      10000

#define TPS51632_VOLTAGE_STEP_20mV      20000

#define TPS51632_MAX_VSEL           0x7F

#define TPS51632_MIN_VSEL           0x19

#define TPS51632_DEFAULT_RAMP_DELAY     6000

#define TPS51632_VOLT_VSEL(uV)                  \

        (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE,    \

            TPS51632_VOLTAGE_STEP_10mV) +       \

            TPS51632_MIN_VSEL)

​

/* TPS51632 chip information */

struct tps51632_chip {

    struct device *dev;

    struct regulator_desc desc;

    struct regulator_dev *rdev;

    struct regmap *regmap;

};

​