linux-imx

/*

 * RTC driver for the Armada 38x Marvell SoCs

 *

 * Copyright (C) 2015 Marvell

 *

 * Gregory Clement <gregory.clement@free-electrons.com>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of the

 * License, or (at your option) any later version.

 *

 */

​

#include <linux/delay.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/rtc.h>

​

#define RTC_STATUS      0x0

#define RTC_STATUS_ALARM1       BIT(0)

#define RTC_STATUS_ALARM2       BIT(1)

#define RTC_IRQ1_CONF       0x4

#define RTC_IRQ2_CONF       0x8

#define RTC_IRQ_AL_EN           BIT(0)

#define RTC_IRQ_FREQ_EN         BIT(1)

#define RTC_IRQ_FREQ_1HZ        BIT(2)

#define RTC_CCR         0x18

#define RTC_CCR_MODE            BIT(15)

#define RTC_CONF_TEST       0x1C

#define RTC_NOMINAL_TIMING      BIT(13)

​

#define RTC_TIME        0xC

#define RTC_ALARM1      0x10

#define RTC_ALARM2      0x14

​

/* Armada38x SoC registers  */

#define RTC_38X_BRIDGE_TIMING_CTL   0x0

#define RTC_38X_PERIOD_OFFS     0

#define RTC_38X_PERIOD_MASK     (0x3FF << RTC_38X_PERIOD_OFFS)

#define RTC_38X_READ_DELAY_OFFS     26

#define RTC_38X_READ_DELAY_MASK     (0x1F << RTC_38X_READ_DELAY_OFFS)

​

/* Armada 7K/8K registers  */

#define RTC_8K_BRIDGE_TIMING_CTL0    0x0

#define RTC_8K_WRCLK_PERIOD_OFFS    0

#define RTC_8K_WRCLK_PERIOD_MASK    (0xFFFF << RTC_8K_WRCLK_PERIOD_OFFS)

#define RTC_8K_WRCLK_SETUP_OFFS     16

#define RTC_8K_WRCLK_SETUP_MASK     (0xFFFF << RTC_8K_WRCLK_SETUP_OFFS)

#define RTC_8K_BRIDGE_TIMING_CTL1   0x4

#define RTC_8K_READ_DELAY_OFFS      0

#define RTC_8K_READ_DELAY_MASK      (0xFFFF << RTC_8K_READ_DELAY_OFFS)

​

#define RTC_8K_ISR          0x10

#define RTC_8K_IMR          0x14

#define RTC_8K_ALARM2           BIT(0)

​

#define SOC_RTC_INTERRUPT       0x8

#define SOC_RTC_ALARM1          BIT(0)

#define SOC_RTC_ALARM2          BIT(1)