linux-imx

/*

 * drivers/rtc/rtc-pl031.c

 *

 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC

 *

 * Author: Deepak Saxena <dsaxena@plexity.net>

 *

 * Copyright 2006 (c) MontaVista Software, Inc.

 *

 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>

 * Copyright 2010 (c) ST-Ericsson AB

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; either version

 * 2 of the License, or (at your option) any later version.

 */

#include <linux/module.h>

#include <linux/rtc.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/amba/bus.h>

#include <linux/io.h>

#include <linux/bcd.h>

#include <linux/delay.h>

#include <linux/pm_wakeirq.h>

#include <linux/slab.h>

​

/*

 * Register definitions

 */

#define RTC_DR      0x00    /* Data read register */

#define RTC_MR      0x04    /* Match register */

#define RTC_LR      0x08    /* Data load register */

#define RTC_CR      0x0c    /* Control register */

#define RTC_IMSC    0x10    /* Interrupt mask and set register */

#define RTC_RIS     0x14    /* Raw interrupt status register */

#define RTC_MIS     0x18    /* Masked interrupt status register */

#define RTC_ICR     0x1c    /* Interrupt clear register */

/* ST variants have additional timer functionality */

#define RTC_TDR     0x20    /* Timer data read register */

#define RTC_TLR     0x24    /* Timer data load register */

#define RTC_TCR     0x28    /* Timer control register */

#define RTC_YDR     0x30    /* Year data read register */

#define RTC_YMR     0x34    /* Year match register */

#define RTC_YLR     0x38    /* Year data load register */

​

#define RTC_CR_EN   (1 << 0)    /* counter enable bit */

#define RTC_CR_CWEN (1 << 26)   /* Clockwatch enable bit */

​

#define RTC_TCR_EN  (1 << 1) /* Periodic timer enable bit */

​

/* Common bit definitions for Interrupt status and control registers */

#define RTC_BIT_AI  (1 << 0) /* Alarm interrupt bit */

#define RTC_BIT_PI  (1 << 1) /* Periodic interrupt bit. ST variants only. */

​

/* Common bit definations for ST v2 for reading/writing time */

#define RTC_SEC_SHIFT 0

#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */

#define RTC_MIN_SHIFT 6

#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */

#define RTC_HOUR_SHIFT 12

#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */