Source
static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* RTC Register offsets from RTC CTRL REG */
/* RTC_CTRL register bit fields */
/**
* struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
* @ctrl: base address of control register
* @write: base address of write register
* @read: base address of read register
* @alarm_ctrl: base address of alarm control register
* @alarm_ctrl2: base address of alarm control2 register
* @alarm_rw: base address of alarm read-write register
* @alarm_en: alarm enable mask
*/
struct pm8xxx_rtc_regs {
unsigned int ctrl;
unsigned int write;
unsigned int read;
unsigned int alarm_ctrl;
unsigned int alarm_ctrl2;
unsigned int alarm_rw;
unsigned int alarm_en;
};
/**
* struct pm8xxx_rtc - rtc driver internal structure
* @rtc: rtc device for this driver.
* @regmap: regmap used to access RTC registers
* @allow_set_time: indicates whether writing to the RTC is allowed
* @rtc_alarm_irq: rtc alarm irq number.
* @ctrl_reg: rtc control register.
* @rtc_dev: device structure.
* @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
*/