Source
x
dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
// http://www.samsung.com
//
// Copyright (C) 2013 Google, Inc
/*
* Maximum number of retries for checking changes in UDR field
* of S5M_RTC_UDR_CON register (to limit possible endless loop).
*
* After writing to RTC registers (setting time or alarm) read the UDR field
* in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
* been transferred.
*/
enum {
RTC_SEC = 0,
RTC_MIN,
RTC_HOUR,
RTC_WEEKDAY,
RTC_DATE,
RTC_MONTH,
RTC_YEAR1,
RTC_YEAR2,
/* Make sure this is always the last enum name. */
RTC_MAX_NUM_TIME_REGS
};
/*
* Registers used by the driver which are different between chipsets.
*
* Operations like read time and write alarm/time require updating
* specific fields in UDR register. These fields usually are auto-cleared
* (with some exceptions).
*
* Table of operations per device:
*
* Device | Write time | Read time | Write alarm
* =================================================
* S5M8767 | UDR + TIME | | UDR
* S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
* S2MPS13 | WUDR | RUDR | WUDR + AUDR
* S2MPS15 | WUDR | RUDR | AUDR
*/
struct s5m_rtc_reg_config {
/* Number of registers used for setting time/alarm0/alarm1 */
unsigned int regs_count;
/* First register for time, seconds */
unsigned int time;
/* RTC control register */
unsigned int ctrl;
/* First register for alarm 0, seconds */
unsigned int alarm0;
/* First register for alarm 1, seconds */
unsigned int alarm1;
/*
* Register for update flag (UDR). Typically setting UDR field to 1
* will enable update of time or alarm register. Then it will be
* auto-cleared after successful update.
*/
unsigned int udr_update;
/* Auto-cleared mask in UDR field for writing time and alarm */
unsigned int autoclear_udr_mask;
/*
* Masks in UDR field for time and alarm operations.
* The read time mask can be 0. Rest should not.
*/
unsigned int read_time_udr_mask;
unsigned int write_time_udr_mask;
unsigned int write_alarm_udr_mask;
};
/* Register map for S5M8763 and S5M8767 */
static const struct s5m_rtc_reg_config s5m_rtc_regs = {
.regs_count = 8,
.time = S5M_RTC_SEC,
.ctrl = S5M_ALARM1_CONF,