linux-imx

// SPDX-License-Identifier: GPL-2.0

/*

 * ESP front-end for Amiga ZORRO SCSI systems.

 *

 * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)

 *

 * Copyright (C) 2011,2018 Michael Schmitz (schmitz@debian.org) for

 *               migration to ESP SCSI core

 *

 * Copyright (C) 2013 Tuomas Vainikka (tuomas.vainikka@aalto.fi) for

 *               Blizzard 1230 DMA and probe function fixes

 */

/*

 * ZORRO bus code from:

 */

/*

 * Detection routine for the NCR53c710 based Amiga SCSI Controllers for Linux.

 *      Amiga MacroSystemUS WarpEngine SCSI controller.

 *      Amiga Technologies/DKB A4091 SCSI controller.

 *

 * Written 1997 by Alan Hourihane <alanh@fairlite.demon.co.uk>

 * plus modifications of the 53c7xx.c driver to support the Amiga.

 *

 * Rewritten to use 53c700.c by Kars de Jong <jongk@linux-m68k.org>

 */

​

#define pr_fmt(fmt)        KBUILD_MODNAME ": " fmt

​

#include <linux/module.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/dma-mapping.h>

#include <linux/scatterlist.h>

#include <linux/delay.h>

#include <linux/zorro.h>

#include <linux/slab.h>

​

#include <asm/page.h>

#include <asm/pgtable.h>

#include <asm/cacheflush.h>

#include <asm/amigahw.h>

#include <asm/amigaints.h>

​

#include <scsi/scsi_host.h>

#include <scsi/scsi_transport_spi.h>

#include <scsi/scsi_device.h>

#include <scsi/scsi_tcq.h>

​

#include "esp_scsi.h"

​

MODULE_AUTHOR("Michael Schmitz <schmitz@debian.org>");

MODULE_DESCRIPTION("Amiga Zorro NCR5C9x (ESP) driver");

MODULE_LICENSE("GPL");

​

/* per-board register layout definitions */

​

/* Blizzard 1230 DMA interface */

​

struct blz1230_dma_registers {

    unsigned char dma_addr;     /* DMA address      [0x0000] */

    unsigned char dmapad2[0x7fff];

    unsigned char dma_latch;    /* DMA latch        [0x8000] */

};

​

/* Blizzard 1230II DMA interface */

​

struct blz1230II_dma_registers {

    unsigned char dma_addr;     /* DMA address      [0x0000] */

    unsigned char dmapad2[0xf];

    unsigned char dma_latch;    /* DMA latch        [0x0010] */

};

​

/* Blizzard 2060 DMA interface */

​

struct blz2060_dma_registers {

    unsigned char dma_led_ctrl; /* DMA led control   [0x000] */

    unsigned char dmapad1[0x0f];

    unsigned char dma_addr0;    /* DMA address (MSB) [0x010] */

    unsigned char dmapad2[0x03];

    unsigned char dma_addr1;    /* DMA address       [0x014] */

    unsigned char dmapad3[0x03];

    unsigned char dma_addr2;    /* DMA address       [0x018] */

    unsigned char dmapad4[0x03];

    unsigned char dma_addr3;    /* DMA address (LSB) [0x01c] */

};

​

/* DMA control bits */

#define DMA_WRITE 0x80000000

​

/* Cyberstorm DMA interface */

​

struct cyber_dma_registers {