linux-imx

/*

 * drivers/soc/tegra/flowctrl.c

 *

 * Functions and macros to control the flowcontroller

 *

 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

​

#include <linux/cpumask.h>

#include <linux/init.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/platform_device.h>

​

#include <soc/tegra/common.h>

#include <soc/tegra/flowctrl.h>

#include <soc/tegra/fuse.h>

​

static u8 flowctrl_offset_halt_cpu[] = {

    FLOW_CTRL_HALT_CPU0_EVENTS,

    FLOW_CTRL_HALT_CPU1_EVENTS,

    FLOW_CTRL_HALT_CPU1_EVENTS + 8,

    FLOW_CTRL_HALT_CPU1_EVENTS + 16,

};

​

static u8 flowctrl_offset_cpu_csr[] = {

    FLOW_CTRL_CPU0_CSR,

    FLOW_CTRL_CPU1_CSR,

    FLOW_CTRL_CPU1_CSR + 8,

    FLOW_CTRL_CPU1_CSR + 16,

};

​

static void __iomem *tegra_flowctrl_base;

​

static void flowctrl_update(u8 offset, u32 value)

{

    if (WARN_ONCE(IS_ERR_OR_NULL(tegra_flowctrl_base),

              "Tegra flowctrl not initialised!\n"))

        return;

​

    writel(value, tegra_flowctrl_base + offset);

​

    /* ensure the update has reached the flow controller */

    wmb();

    readl_relaxed(tegra_flowctrl_base + offset);

}

​

u32 flowctrl_read_cpu_csr(unsigned int cpuid)

{