linux-imx

// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)

// Copyright(c) 2015-17 Intel Corporation.

​

/*

 * Soundwire Intel Master Driver

 */

​

#include <linux/acpi.h>

#include <linux/delay.h>

#include <linux/interrupt.h>

#include <linux/platform_device.h>

#include <sound/pcm_params.h>

#include <sound/soc.h>

#include <linux/soundwire/sdw_registers.h>

#include <linux/soundwire/sdw.h>

#include <linux/soundwire/sdw_intel.h>

#include "cadence_master.h"

#include "intel.h"

​

/* Intel SHIM Registers Definition */

#define SDW_SHIM_LCAP           0x0

#define SDW_SHIM_LCTL           0x4

#define SDW_SHIM_IPPTR          0x8

#define SDW_SHIM_SYNC           0xC

​

#define SDW_SHIM_CTLSCAP(x)     (0x010 + 0x60 * x)

#define SDW_SHIM_CTLS0CM(x)     (0x012 + 0x60 * x)

#define SDW_SHIM_CTLS1CM(x)     (0x014 + 0x60 * x)

#define SDW_SHIM_CTLS2CM(x)     (0x016 + 0x60 * x)

#define SDW_SHIM_CTLS3CM(x)     (0x018 + 0x60 * x)

#define SDW_SHIM_PCMSCAP(x)     (0x020 + 0x60 * x)

​

#define SDW_SHIM_PCMSYCHM(x, y)     (0x022 + (0x60 * x) + (0x2 * y))

#define SDW_SHIM_PCMSYCHC(x, y)     (0x042 + (0x60 * x) + (0x2 * y))

#define SDW_SHIM_PDMSCAP(x)     (0x062 + 0x60 * x)

#define SDW_SHIM_IOCTL(x)       (0x06C + 0x60 * x)

#define SDW_SHIM_CTMCTL(x)      (0x06E + 0x60 * x)

​

#define SDW_SHIM_WAKEEN         0x190

#define SDW_SHIM_WAKESTS        0x192

​

#define SDW_SHIM_LCTL_SPA       BIT(0)

#define SDW_SHIM_LCTL_CPA       BIT(8)

​

#define SDW_SHIM_SYNC_SYNCPRD_VAL   0x176F

#define SDW_SHIM_SYNC_SYNCPRD       GENMASK(14, 0)

#define SDW_SHIM_SYNC_SYNCCPU       BIT(15)

#define SDW_SHIM_SYNC_CMDSYNC_MASK  GENMASK(19, 16)

#define SDW_SHIM_SYNC_CMDSYNC       BIT(16)

#define SDW_SHIM_SYNC_SYNCGO        BIT(24)

​

#define SDW_SHIM_PCMSCAP_ISS        GENMASK(3, 0)

#define SDW_SHIM_PCMSCAP_OSS        GENMASK(7, 4)

#define SDW_SHIM_PCMSCAP_BSS        GENMASK(12, 8)

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#define SDW_SHIM_PCMSYCM_LCHN       GENMASK(3, 0)

#define SDW_SHIM_PCMSYCM_HCHN       GENMASK(7, 4)

#define SDW_SHIM_PCMSYCM_STREAM     GENMASK(13, 8)

#define SDW_SHIM_PCMSYCM_DIR        BIT(15)

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#define SDW_SHIM_PDMSCAP_ISS        GENMASK(3, 0)

#define SDW_SHIM_PDMSCAP_OSS        GENMASK(7, 4)

#define SDW_SHIM_PDMSCAP_BSS        GENMASK(12, 8)