linux-imx

/*

 * Driver for Atmel AT32 and AT91 SPI Controllers

 *

 * Copyright (C) 2006 Atmel Corporation

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

​

#include <linux/kernel.h>

#include <linux/clk.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/delay.h>

#include <linux/dma-mapping.h>

#include <linux/dmaengine.h>

#include <linux/err.h>

#include <linux/interrupt.h>

#include <linux/spi/spi.h>

#include <linux/slab.h>

#include <linux/platform_data/dma-atmel.h>

#include <linux/of.h>

​

#include <linux/io.h>

#include <linux/gpio/consumer.h>

#include <linux/pinctrl/consumer.h>

#include <linux/pm_runtime.h>

​

/* SPI register offsets */

#define SPI_CR                  0x0000

#define SPI_MR                  0x0004

#define SPI_RDR                 0x0008

#define SPI_TDR                 0x000c

#define SPI_SR                  0x0010

#define SPI_IER                 0x0014

#define SPI_IDR                 0x0018

#define SPI_IMR                 0x001c

#define SPI_CSR0                0x0030

#define SPI_CSR1                0x0034

#define SPI_CSR2                0x0038

#define SPI_CSR3                0x003c

#define SPI_FMR                 0x0040

#define SPI_FLR                 0x0044

#define SPI_VERSION             0x00fc

#define SPI_RPR                 0x0100

#define SPI_RCR                 0x0104

#define SPI_TPR                 0x0108

#define SPI_TCR                 0x010c

#define SPI_RNPR                0x0110

#define SPI_RNCR                0x0114

#define SPI_TNPR                0x0118

#define SPI_TNCR                0x011c

#define SPI_PTCR                0x0120

#define SPI_PTSR                0x0124

​

/* Bitfields in CR */

#define SPI_SPIEN_OFFSET            0

#define SPI_SPIEN_SIZE              1

#define SPI_SPIDIS_OFFSET           1

#define SPI_SPIDIS_SIZE             1

#define SPI_SWRST_OFFSET            7

#define SPI_SWRST_SIZE              1

#define SPI_LASTXFER_OFFSET         24

#define SPI_LASTXFER_SIZE           1

#define SPI_TXFCLR_OFFSET           16

#define SPI_TXFCLR_SIZE             1

#define SPI_RXFCLR_OFFSET           17

#define SPI_RXFCLR_SIZE             1

#define SPI_FIFOEN_OFFSET           30

#define SPI_FIFOEN_SIZE             1

#define SPI_FIFODIS_OFFSET          31

#define SPI_FIFODIS_SIZE            1

​

/* Bitfields in MR */

#define SPI_MSTR_OFFSET             0

#define SPI_MSTR_SIZE               1

#define SPI_PS_OFFSET               1

#define SPI_PS_SIZE             1

#define SPI_PCSDEC_OFFSET           2

#define SPI_PCSDEC_SIZE             1

#define SPI_FDIV_OFFSET             3

#define SPI_FDIV_SIZE               1

#define SPI_MODFDIS_OFFSET          4

#define SPI_MODFDIS_SIZE            1

#define SPI_WDRBT_OFFSET            5

#define SPI_WDRBT_SIZE              1

#define SPI_LLB_OFFSET              7

#define SPI_LLB_SIZE                1

#define SPI_PCS_OFFSET              16

#define SPI_PCS_SIZE                4

#define SPI_DLYBCS_OFFSET           24