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pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld, we use the max prescaler value.\n",// SPDX-License-Identifier: GPL-2.0+//// Copyright 2013 Freescale Semiconductor, Inc.//// Freescale DSPI driver// This file contains a driver for the Freescale DSPI#include <linux/clk.h>#include <linux/delay.h>#include <linux/dmaengine.h>#include <linux/dma-mapping.h>#include <linux/err.h>#include <linux/errno.h>#include <linux/interrupt.h>#include <linux/io.h>#include <linux/kernel.h>#include <linux/math64.h>#include <linux/module.h>#include <linux/of.h>#include <linux/of_device.h>#include <linux/pinctrl/consumer.h>#include <linux/platform_device.h>#include <linux/pm_runtime.h>#include <linux/regmap.h>#include <linux/sched.h>#include <linux/spi/spi.h>#include <linux/spi/spi-fsl-dspi.h>#include <linux/spi/spi_bitbang.h>#include <linux/time.h>#define DRIVER_NAME "fsl-dspi"#ifdef CONFIG_M5441x#define DSPI_FIFO_SIZE 16#else#define DSPI_FIFO_SIZE 4#endif#define DSPI_DMA_BUFSIZE (DSPI_FIFO_SIZE * 1024)#define SPI_MCR 0x00#define SPI_MCR_MASTER (1 << 31)#define SPI_MCR_PCSIS (0x3F << 16)#define SPI_MCR_CLR_TXF (1 << 11)#define SPI_MCR_CLR_RXF (1 << 10)#define SPI_MCR_XSPI (1 << 3)#define SPI_TCR 0x08#define SPI_TCR_GET_TCNT(x) (((x) & 0xffff0000) >> 16)#define SPI_CTAR(x) (0x0c + (((x) & 0x3) * 4))#define SPI_CTAR_FMSZ(x) (((x) & 0x0000000f) << 27)#define SPI_CTAR_CPOL(x) ((x) << 26)#define SPI_CTAR_CPHA(x) ((x) << 25)#define SPI_CTAR_LSBFE(x) ((x) << 24)#define SPI_CTAR_PCSSCK(x) (((x) & 0x00000003) << 22)#define SPI_CTAR_PASC(x) (((x) & 0x00000003) << 20)#define SPI_CTAR_PDT(x) (((x) & 0x00000003) << 18)#define SPI_CTAR_PBR(x) (((x) & 0x00000003) << 16)#define SPI_CTAR_CSSCK(x) (((x) & 0x0000000f) << 12)#define SPI_CTAR_ASC(x) (((x) & 0x0000000f) << 8)#define SPI_CTAR_DT(x) (((x) & 0x0000000f) << 4)#define SPI_CTAR_BR(x) ((x) & 0x0000000f)#define SPI_CTAR_SCALE_BITS 0xf#define SPI_CTAR0_SLAVE 0x0c#define SPI_SR 0x2c#define SPI_SR_EOQF 0x10000000#define SPI_SR_TCFQF 0x80000000#define SPI_SR_CLEAR 0x9aaf0000#define SPI_RSER_TFFFE BIT(25)#define SPI_RSER_TFFFD BIT(24)#define SPI_RSER_RFDFE BIT(17)#define SPI_RSER_RFDFD BIT(16)#define SPI_RSER 0x30#define SPI_RSER_EOQFE 0x10000000#define SPI_RSER_TCFQE 0x80000000#define SPI_PUSHR 0x34#define SPI_PUSHR_CMD_CONT (1 << 15)#define SPI_PUSHR_CONT (SPI_PUSHR_CMD_CONT << 16)#define SPI_PUSHR_CMD_CTAS(x) (((x) & 0x0003) << 12)#define SPI_PUSHR_CTAS(x) (SPI_PUSHR_CMD_CTAS(x) << 16)#define SPI_PUSHR_CMD_EOQ (1 << 11)#define SPI_PUSHR_EOQ (SPI_PUSHR_CMD_EOQ << 16)#define SPI_PUSHR_CMD_CTCNT (1 << 10)#define SPI_PUSHR_CTCNT (SPI_PUSHR_CMD_CTCNT << 16)#define SPI_PUSHR_CMD_PCS(x) ((1 << x) & 0x003f)#define SPI_PUSHR_PCS(x) (SPI_PUSHR_CMD_PCS(x) << 16)#define SPI_PUSHR_TXDATA(x) ((x) & 0x0000ffff)