linux-imx

/*

 * Freescale SPI/eSPI controller driver library.

 *

 * Maintainer: Kumar Gala

 *

 * Copyright 2010 Freescale Semiconductor, Inc.

 * Copyright (C) 2006 Polycom, Inc.

 *

 * CPM SPI and QE buffer descriptors mode support:

 * Copyright (c) 2009  MontaVista Software, Inc.

 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */

#ifndef __SPI_FSL_LIB_H__

#define __SPI_FSL_LIB_H__

​

#include <asm/io.h>

​

/* SPI/eSPI Controller driver's private data. */

struct mpc8xxx_spi {

    struct device *dev;

    void __iomem *reg_base;

​

    /* rx & tx bufs from the spi_transfer */

    const void *tx;

    void *rx;

​

    int subblock;

    struct spi_pram __iomem *pram;

#ifdef CONFIG_FSL_SOC

    struct cpm_buf_desc __iomem *tx_bd;

    struct cpm_buf_desc __iomem *rx_bd;

#endif

​

    struct spi_transfer *xfer_in_progress;

​

    /* dma addresses for CPM transfers */

    dma_addr_t tx_dma;

    dma_addr_t rx_dma;

    bool map_tx_dma;

    bool map_rx_dma;

​

    dma_addr_t dma_dummy_tx;

    dma_addr_t dma_dummy_rx;

​

    /* functions to deal with different sized buffers */

    void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);

    u32(*get_tx) (struct mpc8xxx_spi *);

​

    unsigned int count;

    unsigned int irq;

​

    unsigned nsecs;     /* (clock cycle time)/2 */

​

    u32 spibrg;     /* SPIBRG input clock */

    u32 rx_shift;       /* RX data reg shift when in qe mode */

    u32 tx_shift;       /* TX data reg shift when in qe mode */

​

    unsigned int flags;