linux-imx

// SPDX-License-Identifier: GPL-2.0+

​

/*

 * NXP FlexSPI(FSPI) controller driver.

 *

 * Copyright 2019 NXP.

 *

 * FlexSPI is a flexsible SPI host controller which supports two SPI

 * channels and up to 4 external devices. Each channel supports

 * Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional

 * data lines).

 *

 * FlexSPI controller is driven by the LUT(Look-up Table) registers

 * LUT registers are a look-up-table for sequences of instructions.

 * A valid sequence consists of four LUT registers.

 * Maximum 32 LUT sequences can be programmed simultaneously.

 *

 * LUTs are being created at run-time based on the commands passed

 * from the spi-mem framework, thus using single LUT index.

 *

 * Software triggered Flash read/write access by IP Bus.

 *

 * Memory mapped read access by AHB Bus.

 *

 * Based on SPI MEM interface and spi-fsl-qspi.c driver.

 *

 * Author:

 *     Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>

 *     Boris Brezillon <bbrezillon@kernel.org>

 *     Frieder Schrempf <frieder.schrempf@kontron.de>

 */

​

#include <linux/bitops.h>

#include <linux/clk.h>

#include <linux/completion.h>

#include <linux/delay.h>

#include <linux/err.h>

#include <linux/errno.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/iopoll.h>

#include <linux/jiffies.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/mutex.h>

#include <linux/of.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/pm_qos.h>

#include <linux/sizes.h>

​

#include <linux/spi/spi.h>

#include <linux/spi/spi-mem.h>

​

/*

 * The driver only uses one single LUT entry, that is updated on

 * each call of exec_op(). Index 0 is preset at boot with a basic

 * read operation, so let's use the last entry (31).

 */

#define SEQID_LUT           31

​

/* Registers used by the driver */

#define FSPI_MCR0           0x00