linux-imx

/*

 * Marvell Orion SPI controller driver

 *

 * Author: Shadi Ammouri <shadi@marvell.com>

 * Copyright (C) 2007-2008 Marvell Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

​

#include <linux/interrupt.h>

#include <linux/delay.h>

#include <linux/platform_device.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/spi/spi.h>

#include <linux/module.h>

#include <linux/pm_runtime.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/of_device.h>

#include <linux/of_gpio.h>

#include <linux/clk.h>

#include <linux/sizes.h>

#include <linux/gpio.h>

#include <asm/unaligned.h>

​

#define DRIVER_NAME         "orion_spi"

​

/* Runtime PM autosuspend timeout: PM is fairly light on this driver */

#define SPI_AUTOSUSPEND_TIMEOUT     200

​

/* Some SoCs using this driver support up to 8 chip selects.

 * It is up to the implementer to only use the chip selects

 * that are available.

 */

#define ORION_NUM_CHIPSELECTS       8

​

#define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */

​

#define ORION_SPI_IF_CTRL_REG       0x00

#define ORION_SPI_IF_CONFIG_REG     0x04

#define ORION_SPI_IF_RXLSBF     BIT(14)

#define ORION_SPI_IF_TXLSBF     BIT(13)

#define ORION_SPI_DATA_OUT_REG      0x08

#define ORION_SPI_DATA_IN_REG       0x0c

#define ORION_SPI_INT_CAUSE_REG     0x10

#define ORION_SPI_TIMING_PARAMS_REG 0x18

​

/* Register for the "Direct Mode" */

#define SPI_DIRECT_WRITE_CONFIG_REG 0x20

​

#define ORION_SPI_TMISO_SAMPLE_MASK (0x3 << 6)

#define ORION_SPI_TMISO_SAMPLE_1    (1 << 6)

#define ORION_SPI_TMISO_SAMPLE_2    (2 << 6)

​

#define ORION_SPI_MODE_CPOL     (1 << 11)

#define ORION_SPI_MODE_CPHA     (1 << 12)

#define ORION_SPI_IF_8_16_BIT_MODE  (1 << 5)

#define ORION_SPI_CLK_PRESCALE_MASK 0x1F

#define ARMADA_SPI_CLK_PRESCALE_MASK    0xDF

#define ORION_SPI_MODE_MASK     (ORION_SPI_MODE_CPOL | \

                     ORION_SPI_MODE_CPHA)

#define ORION_SPI_CS_MASK   0x1C

#define ORION_SPI_CS_SHIFT  2

#define ORION_SPI_CS(cs)    ((cs << ORION_SPI_CS_SHIFT) & \

                    ORION_SPI_CS_MASK)

​

enum orion_spi_type {

    ORION_SPI,

    ARMADA_SPI,

};

​

struct orion_spi_dev {

    enum orion_spi_type typ;

    /*

     * min_divisor and max_hz should be exclusive, the only we can

     * have both is for managing the armada-370-spi case with old

     * device tree

     */

    unsigned long       max_hz;

    unsigned int        min_divisor;

    unsigned int        max_divisor;

    u32         prescale_mask;

    bool            is_errata_50mhz_ac;

};

​

struct orion_direct_acc {

    void __iomem        *vaddr;

    u32         size;

};