linux-imx

/*

 * SPI_PPC4XX SPI controller driver.

 *

 * Copyright (C) 2007 Gary Jennejohn <garyj@denx.de>

 * Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering

 * Copyright 2009 Harris Corporation, Steven A. Falco <sfalco@harris.com>

 *

 * Based in part on drivers/spi/spi_s3c24xx.c

 *

 * Copyright (c) 2006 Ben Dooks

 * Copyright (c) 2006 Simtec Electronics

 *  Ben Dooks <ben@simtec.co.uk>

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under the terms of the GNU General Public License version 2 as published

 * by the Free Software Foundation.

 */

​

/*

 * The PPC4xx SPI controller has no FIFO so each sent/received byte will

 * generate an interrupt to the CPU. This can cause high CPU utilization.

 * This driver allows platforms to reduce the interrupt load on the CPU

 * during SPI transfers by setting max_speed_hz via the device tree.

 */

​

#include <linux/module.h>

#include <linux/sched.h>

#include <linux/slab.h>

#include <linux/errno.h>

#include <linux/wait.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>

#include <linux/of_platform.h>

#include <linux/of_gpio.h>

#include <linux/interrupt.h>

#include <linux/delay.h>

​

#include <linux/gpio.h>

#include <linux/spi/spi.h>

#include <linux/spi/spi_bitbang.h>

​

#include <asm/io.h>

#include <asm/dcr.h>

#include <asm/dcr-regs.h>

​

/* bits in mode register - bit 0 is MSb */

​

/*

 * SPI_PPC4XX_MODE_SCP = 0 means "data latched on trailing edge of clock"

 * SPI_PPC4XX_MODE_SCP = 1 means "data latched on leading edge of clock"

 * Note: This is the inverse of CPHA.

 */

#define SPI_PPC4XX_MODE_SCP (0x80 >> 3)

​

/* SPI_PPC4XX_MODE_SPE = 1 means "port enabled" */

#define SPI_PPC4XX_MODE_SPE (0x80 >> 4)

​

/*

 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode

 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode

 * Note: This is identical to SPI_LSB_FIRST.

 */

#define SPI_PPC4XX_MODE_RD  (0x80 >> 5)

​

/*

 * SPI_PPC4XX_MODE_CI = 0 means "clock idles low"

 * SPI_PPC4XX_MODE_CI = 1 means "clock idles high"

 * Note: This is identical to CPOL.

 */

#define SPI_PPC4XX_MODE_CI  (0x80 >> 6)

​

/*

 * SPI_PPC4XX_MODE_IL = 0 means "loopback disable"

 * SPI_PPC4XX_MODE_IL = 1 means "loopback enable"

 */

#define SPI_PPC4XX_MODE_IL  (0x80 >> 7)

​

/* bits in control register */

/* starts a transfer when set */

#define SPI_PPC4XX_CR_STR   (0x80 >> 7)

​

/* bits in status register */

/* port is busy with a transfer */

#define SPI_PPC4XX_SR_BSY   (0x80 >> 6)

/* RxD ready */

#define SPI_PPC4XX_SR_RBR   (0x80 >> 7)

​

/* clock settings (SCP and CI) for various SPI modes */

#define SPI_CLK_MODE0   (SPI_PPC4XX_MODE_SCP | 0)

#define SPI_CLK_MODE1   (0 | 0)

#define SPI_CLK_MODE2   (SPI_PPC4XX_MODE_SCP | SPI_PPC4XX_MODE_CI)

#define SPI_CLK_MODE3   (0 | SPI_PPC4XX_MODE_CI)