linux-imx

/*

 * SPI controller driver for the Mikrotik RB4xx boards

 *

 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>

 * Copyright (C) 2015 Bert Vermeulen <bert@biot.com>

 *

 * This file was based on the patches for Linux 2.6.27.39 published by

 * MikroTik for their RouterBoard 4xx series devices.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 */

​

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/clk.h>

#include <linux/spi/spi.h>

​

#include <asm/mach-ath79/ar71xx_regs.h>

​

struct rb4xx_spi {

    void __iomem *base;

    struct clk *clk;

};

​

static inline u32 rb4xx_read(struct rb4xx_spi *rbspi, u32 reg)

{

    return __raw_readl(rbspi->base + reg);

}

​

static inline void rb4xx_write(struct rb4xx_spi *rbspi, u32 reg, u32 value)

{

    __raw_writel(value, rbspi->base + reg);

}

​

static inline void do_spi_clk(struct rb4xx_spi *rbspi, u32 spi_ioc, int value)

{

    u32 regval;

​

    regval = spi_ioc;

    if (value & BIT(0))

        regval |= AR71XX_SPI_IOC_DO;

​

    rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval);

    rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK);

}

​

static void do_spi_byte(struct rb4xx_spi *rbspi, u32 spi_ioc, u8 byte)

{

    int i;

​

    for (i = 7; i >= 0; i--)

        do_spi_clk(rbspi, spi_ioc, byte >> i);

}

​

/* The CS2 pin is used to clock in a second bit per clock cycle. */

static inline void do_spi_clk_two(struct rb4xx_spi *rbspi, u32 spi_ioc,

                   u8 value)

{

    u32 regval;

​

    regval = spi_ioc;

    if (value & BIT(1))

        regval |= AR71XX_SPI_IOC_DO;

    if (value & BIT(0))

        regval |= AR71XX_SPI_IOC_CS2;

​

    rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval);

    rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK);

}

​

/* Two bits at a time, msb first */

static void do_spi_byte_two(struct rb4xx_spi *rbspi, u32 spi_ioc, u8 byte)

{

    do_spi_clk_two(rbspi, spi_ioc, byte >> 6);

    do_spi_clk_two(rbspi, spi_ioc, byte >> 4);

    do_spi_clk_two(rbspi, spi_ioc, byte >> 2);

    do_spi_clk_two(rbspi, spi_ioc, byte >> 0);

}

​

static void rb4xx_set_cs(struct spi_device *spi, bool enable)

{

    struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);

​

    /*

     * Setting CS is done along with bitbanging the actual values,

     * since it's all on the same hardware register. However the

     * CPLD needs CS deselected after every command.

     */