linux-imx

/*

 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd

 * Author: Addy Ke <addy.ke@rock-chips.com>

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 */

​

#include <linux/clk.h>

#include <linux/dmaengine.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/pinctrl/consumer.h>

#include <linux/platform_device.h>

#include <linux/spi/spi.h>

#include <linux/pm_runtime.h>

#include <linux/scatterlist.h>

​

#define DRIVER_NAME "rockchip-spi"

​

#define ROCKCHIP_SPI_CLR_BITS(reg, bits) \

        writel_relaxed(readl_relaxed(reg) & ~(bits), reg)

#define ROCKCHIP_SPI_SET_BITS(reg, bits) \

        writel_relaxed(readl_relaxed(reg) | (bits), reg)

​

/* SPI register offsets */

#define ROCKCHIP_SPI_CTRLR0         0x0000

#define ROCKCHIP_SPI_CTRLR1         0x0004

#define ROCKCHIP_SPI_SSIENR         0x0008

#define ROCKCHIP_SPI_SER            0x000c

#define ROCKCHIP_SPI_BAUDR          0x0010

#define ROCKCHIP_SPI_TXFTLR         0x0014

#define ROCKCHIP_SPI_RXFTLR         0x0018

#define ROCKCHIP_SPI_TXFLR          0x001c

#define ROCKCHIP_SPI_RXFLR          0x0020

#define ROCKCHIP_SPI_SR             0x0024

#define ROCKCHIP_SPI_IPR            0x0028

#define ROCKCHIP_SPI_IMR            0x002c

#define ROCKCHIP_SPI_ISR            0x0030

#define ROCKCHIP_SPI_RISR           0x0034

#define ROCKCHIP_SPI_ICR            0x0038

#define ROCKCHIP_SPI_DMACR          0x003c

#define ROCKCHIP_SPI_DMATDLR        0x0040

#define ROCKCHIP_SPI_DMARDLR        0x0044

#define ROCKCHIP_SPI_TXDR           0x0400

#define ROCKCHIP_SPI_RXDR           0x0800

​

/* Bit fields in CTRLR0 */

#define CR0_DFS_OFFSET              0

#define CR0_DFS_4BIT                0x0

#define CR0_DFS_8BIT                0x1

#define CR0_DFS_16BIT               0x2

​

#define CR0_CFS_OFFSET              2

​

#define CR0_SCPH_OFFSET             6