linux-imx

/*

 * Copyright (C) 2003-2015 Broadcom Corporation

 * All Rights Reserved

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 (GPL v2)

 * as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

#include <linux/acpi.h>

#include <linux/clk.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/spi/spi.h>

#include <linux/of.h>

#include <linux/interrupt.h>

​

/* SPI Configuration Register */

#define XLP_SPI_CONFIG          0x00

#define XLP_SPI_CPHA            BIT(0)

#define XLP_SPI_CPOL            BIT(1)

#define XLP_SPI_CS_POL          BIT(2)

#define XLP_SPI_TXMISO_EN       BIT(3)

#define XLP_SPI_TXMOSI_EN       BIT(4)

#define XLP_SPI_RXMISO_EN       BIT(5)

#define XLP_SPI_CS_LSBFE        BIT(10)

#define XLP_SPI_RXCAP_EN        BIT(11)

​

/* SPI Frequency Divider Register */

#define XLP_SPI_FDIV            0x04

​

/* SPI Command Register */

#define XLP_SPI_CMD         0x08

#define XLP_SPI_CMD_IDLE_MASK       0x0

#define XLP_SPI_CMD_TX_MASK     0x1

#define XLP_SPI_CMD_RX_MASK     0x2

#define XLP_SPI_CMD_TXRX_MASK       0x3

#define XLP_SPI_CMD_CONT        BIT(4)

#define XLP_SPI_XFR_BITCNT_SHIFT    16

​

/* SPI Status Register */

#define XLP_SPI_STATUS          0x0c

#define XLP_SPI_XFR_PENDING     BIT(0)

#define XLP_SPI_XFR_DONE        BIT(1)

#define XLP_SPI_TX_INT          BIT(2)

#define XLP_SPI_RX_INT          BIT(3)

#define XLP_SPI_TX_UF           BIT(4)

#define XLP_SPI_RX_OF           BIT(5)

#define XLP_SPI_STAT_MASK       0x3f

​

/* SPI Interrupt Enable Register */

#define XLP_SPI_INTR_EN         0x10

#define XLP_SPI_INTR_DONE       BIT(0)

#define XLP_SPI_INTR_TXTH       BIT(1)

#define XLP_SPI_INTR_RXTH       BIT(2)

#define XLP_SPI_INTR_TXUF       BIT(3)

#define XLP_SPI_INTR_RXOF       BIT(4)

​

/* SPI FIFO Threshold Register */

#define XLP_SPI_FIFO_THRESH     0x14

​

/* SPI FIFO Word Count Register */

#define XLP_SPI_FIFO_WCNT       0x18

#define XLP_SPI_RXFIFO_WCNT_MASK    0xf

#define XLP_SPI_TXFIFO_WCNT_MASK    0xf0

#define XLP_SPI_TXFIFO_WCNT_SHIFT   4

​

/* SPI Transmit Data FIFO Register */

#define XLP_SPI_TXDATA_FIFO     0x1c

​

/* SPI Receive Data FIFO Register */

#define XLP_SPI_RXDATA_FIFO     0x20

​

/* SPI System Control Register */

#define XLP_SPI_SYSCTRL         0x100

#define XLP_SPI_SYS_RESET       BIT(0)

#define XLP_SPI_SYS_CLKDIS      BIT(1)

#define XLP_SPI_SYS_PMEN        BIT(8)

​

#define SPI_CS_OFFSET           0x40

#define XLP_SPI_TXRXTH          0x80

#define XLP_SPI_FIFO_SIZE       8

#define XLP_SPI_MAX_CS          4

#define XLP_SPI_DEFAULT_FREQ        133333333

#define XLP_SPI_FDIV_MIN        4

#define XLP_SPI_FDIV_MAX        65535

/*