linux-imx

// SPDX-License-Identifier: GPL-2.0

//

// Copyright 2016 Freescale Semiconductor, Inc.

​

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/thermal.h>

​

#include "thermal_core.h"

​

#define SITES_MAX   16

​

/*

 * QorIQ TMU Registers

 */

struct qoriq_tmu_site_regs {

    u32 tritsr;     /* Immediate Temperature Site Register */

    u32 tratsr;     /* Average Temperature Site Register */

    u8 res0[0x8];

};

​

struct qoriq_tmu_regs {

    u32 tmr;        /* Mode Register */

#define TMR_DISABLE 0x0

#define TMR_ME      0x80000000

#define TMR_ALPF    0x0c000000

    u32 tsr;        /* Status Register */

    u32 tmtmir;     /* Temperature measurement interval Register */

#define TMTMIR_DEFAULT  0x0000000f

    u8 res0[0x14];

    u32 tier;       /* Interrupt Enable Register */

#define TIER_DISABLE    0x0

    u32 tidr;       /* Interrupt Detect Register */

    u32 tiscr;      /* Interrupt Site Capture Register */

    u32 ticscr;     /* Interrupt Critical Site Capture Register */

    u8 res1[0x10];

    u32 tmhtcrh;        /* High Temperature Capture Register */

    u32 tmhtcrl;        /* Low Temperature Capture Register */

    u8 res2[0x8];

    u32 tmhtitr;        /* High Temperature Immediate Threshold */

    u32 tmhtatr;        /* High Temperature Average Threshold */

    u32 tmhtactr;   /* High Temperature Average Crit Threshold */

    u8 res3[0x24];

    u32 ttcfgr;     /* Temperature Configuration Register */

    u32 tscfgr;     /* Sensor Configuration Register */

    u8 res4[0x78];

    struct qoriq_tmu_site_regs site[SITES_MAX];

    u8 res5[0x9f8];

    u32 ipbrr0;     /* IP Block Revision Register 0 */

    u32 ipbrr1;     /* IP Block Revision Register 1 */

    u8 res6[0x310];

    u32 ttr0cr;     /* Temperature Range 0 Control Register */

    u32 ttr1cr;     /* Temperature Range 1 Control Register */

    u32 ttr2cr;     /* Temperature Range 2 Control Register */

    u32 ttr3cr;     /* Temperature Range 3 Control Register */

};

​

struct qoriq_tmu_data;

​

/*

 * Thermal zone data

 */

struct qoriq_sensor {

    struct thermal_zone_device  *tzd;

    struct qoriq_tmu_data       *qdata;

    int             id;

};

​

struct qoriq_tmu_data {

    struct qoriq_tmu_regs __iomem *regs;

    bool little_endian;

    struct qoriq_sensor *sensor[SITES_MAX];

};

​

static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)

{

    if (p->little_endian)

        iowrite32(val, addr);

    else

        iowrite32be(val, addr);

}

​

static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)

{

    if (p->little_endian)

        return ioread32(addr);

    else

        return ioread32be(addr);