linux-imx

// SPDX-License-Identifier: GPL-2.0+

/*

 * Macros and prototypes for i.MX21

 *

 * Copyright (C) 2006 Loping Dog Embedded Systems

 * Copyright (C) 2009 Martin Fuzzey

 * Originally written by Jay Monkman <jtm@lopingdog.com>

 * Ported to 2.6.30, debugged and enhanced by Martin Fuzzey

 */

​

#ifndef __LINUX_IMX21_HCD_H__

#define __LINUX_IMX21_HCD_H__

​

#ifdef CONFIG_DYNAMIC_DEBUG

#define DEBUG

#endif

​

#include <linux/platform_data/usb-mx2.h>

​

#define NUM_ISO_ETDS    2

#define USB_NUM_ETD 32

#define DMEM_SIZE       4096

​

/* Register definitions */

#define USBOTG_HWMODE       0x00

#define USBOTG_HWMODE_ANASDBEN      (1 << 14)

#define USBOTG_HWMODE_OTGXCVR_SHIFT 6

#define USBOTG_HWMODE_OTGXCVR_MASK  (3 << 6)

#define USBOTG_HWMODE_OTGXCVR_TD_RD (0 << 6)

#define USBOTG_HWMODE_OTGXCVR_TS_RD (2 << 6)

#define USBOTG_HWMODE_OTGXCVR_TD_RS (1 << 6)

#define USBOTG_HWMODE_OTGXCVR_TS_RS (3 << 6)

#define USBOTG_HWMODE_HOSTXCVR_SHIFT    4

#define USBOTG_HWMODE_HOSTXCVR_MASK (3 << 4)

#define USBOTG_HWMODE_HOSTXCVR_TD_RD    (0 << 4)

#define USBOTG_HWMODE_HOSTXCVR_TS_RD    (2 << 4)

#define USBOTG_HWMODE_HOSTXCVR_TD_RS    (1 << 4)

#define USBOTG_HWMODE_HOSTXCVR_TS_RS    (3 << 4)

#define USBOTG_HWMODE_CRECFG_MASK   (3 << 0)

#define USBOTG_HWMODE_CRECFG_HOST   (1 << 0)

#define USBOTG_HWMODE_CRECFG_FUNC   (2 << 0)

#define USBOTG_HWMODE_CRECFG_HNP    (3 << 0)

​

#define USBOTG_CINT_STAT    0x04

#define USBOTG_CINT_STEN    0x08

#define USBOTG_ASHNPINT         (1 << 5)

#define USBOTG_ASFCINT          (1 << 4)

#define USBOTG_ASHCINT          (1 << 3)

#define USBOTG_SHNPINT          (1 << 2)

#define USBOTG_FCINT            (1 << 1)

#define USBOTG_HCINT            (1 << 0)

​

#define USBOTG_CLK_CTRL     0x0c

#define USBOTG_CLK_CTRL_FUNC        (1 << 2)

#define USBOTG_CLK_CTRL_HST     (1 << 1)

#define USBOTG_CLK_CTRL_MAIN        (1 << 0)

​

#define USBOTG_RST_CTRL     0x10

#define USBOTG_RST_RSTI2C       (1 << 15)

#define USBOTG_RST_RSTCTRL      (1 << 5)

#define USBOTG_RST_RSTFC        (1 << 4)

#define USBOTG_RST_RSTFSKE      (1 << 3)

#define USBOTG_RST_RSTRH        (1 << 2)

#define USBOTG_RST_RSTHSIE      (1 << 1)

#define USBOTG_RST_RSTHC        (1 << 0)

​

#define USBOTG_FRM_INTVL        0x14

#define USBOTG_FRM_REMAIN       0x18

#define USBOTG_HNP_CSR          0x1c

#define USBOTG_HNP_ISR          0x2c

#define USBOTG_HNP_IEN          0x30

​

#define USBOTG_I2C_TXCVR_REG(x) (0x100 + (x))

#define USBOTG_I2C_XCVR_DEVAD       0x118

#define USBOTG_I2C_SEQ_OP_REG       0x119

#define USBOTG_I2C_SEQ_RD_STARTAD   0x11a

#define USBOTG_I2C_OP_CTRL_REG          0x11b

#define USBOTG_I2C_SCLK_TO_SCK_HPER     0x11e

#define USBOTG_I2C_MASTER_INT_REG       0x11f

​

#define USBH_HOST_CTRL      0x80

#define USBH_HOST_CTRL_HCRESET          (1 << 31)

#define USBH_HOST_CTRL_SCHDOVR(x)       ((x) << 16)

#define USBH_HOST_CTRL_RMTWUEN          (1 << 4)

#define USBH_HOST_CTRL_HCUSBSTE_RESET       (0 << 2)

#define USBH_HOST_CTRL_HCUSBSTE_RESUME      (1 << 2)

#define USBH_HOST_CTRL_HCUSBSTE_OPERATIONAL (2 << 2)

#define USBH_HOST_CTRL_HCUSBSTE_SUSPEND (3 << 2)

#define USBH_HOST_CTRL_CTLBLKSR_1       (0 << 0)

#define USBH_HOST_CTRL_CTLBLKSR_2       (1 << 0)

#define USBH_HOST_CTRL_CTLBLKSR_3       (2 << 0)

#define USBH_HOST_CTRL_CTLBLKSR_4       (3 << 0)