linux-imx

/*

 * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.

 *

 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>

 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>

 *

 * This driver was based on: drivers/watchdog/ixp4xx_wdt.c

 *  Author: Deepak Saxena <dsaxena@plexity.net>

 *  Copyright 2004 (c) MontaVista, Software, Inc.

 *

 * which again was based on sa1100 driver,

 *  Copyright (C) 2000 Oleg Drokin <green@crimea.edu>

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 as published

 * by the Free Software Foundation.

 *

 */

​

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

​

#include <linux/bitops.h>

#include <linux/delay.h>

#include <linux/errno.h>

#include <linux/fs.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/miscdevice.h>

#include <linux/module.h>

#include <linux/moduleparam.h>

#include <linux/platform_device.h>

#include <linux/types.h>

#include <linux/watchdog.h>

#include <linux/clk.h>

#include <linux/err.h>

#include <linux/of.h>

#include <linux/of_platform.h>

#include <linux/uaccess.h>

​

#define DRIVER_NAME "ath79-wdt"

​

#define WDT_TIMEOUT 15  /* seconds */

​

#define WDOG_REG_CTRL       0x00

#define WDOG_REG_TIMER      0x04

​

#define WDOG_CTRL_LAST_RESET    BIT(31)

#define WDOG_CTRL_ACTION_MASK   3

#define WDOG_CTRL_ACTION_NONE   0   /* no action */

#define WDOG_CTRL_ACTION_GPI    1   /* general purpose interrupt */

#define WDOG_CTRL_ACTION_NMI    2   /* NMI */

#define WDOG_CTRL_ACTION_FCR    3   /* full chip reset */

​

static bool nowayout = WATCHDOG_NOWAYOUT;

module_param(nowayout, bool, 0);

MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "

               "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

​

static int timeout = WDT_TIMEOUT;

module_param(timeout, int, 0);

MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "

              "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");

​

static unsigned long wdt_flags;

​

#define WDT_FLAGS_BUSY      0

#define WDT_FLAGS_EXPECT_CLOSE  1

​

static struct clk *wdt_clk;

static unsigned long wdt_freq;

static int boot_status;

static int max_timeout;

static void __iomem *wdt_base;

​

static inline void ath79_wdt_wr(unsigned reg, u32 val)

{

    iowrite32(val, wdt_base + reg);

}

​

static inline u32 ath79_wdt_rr(unsigned reg)

{

    return ioread32(wdt_base + reg);

}

​

static inline void ath79_wdt_keepalive(void)

{

    ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);

    /* flush write */

    ath79_wdt_rr(WDOG_REG_TIMER);

}

​

static inline void ath79_wdt_enable(void)