Source
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static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
/*
* Driver for Atmel SAMA5D4 Watchdog Timer
*
* Copyright (C) 2015 Atmel Corporation
*
* Licensed under GPLv2.
*/
/* minimum and maximum watchdog timeout, in seconds */
struct sama5d4_wdt {
struct watchdog_device wdd;
void __iomem *reg_base;
u32 mr;
unsigned long last_ping;
};
static int wdt_timeout;
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(wdt_timeout, int, 0);
MODULE_PARM_DESC(wdt_timeout,
"Watchdog timeout in seconds. (default = "
__MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
/* 4 slow clock periods is 4/32768 = 122.07µs*/
static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
{
/*
* WDT_CR and WDT_MR must not be modified within three slow clock
* periods following a restart of the watchdog performed by a write
* access in WDT_CR.
*/
while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
usleep_range(30, 125);
writel_relaxed(val, wdt->reg_base + field);
wdt->last_ping = jiffies;
}
static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
{
if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
udelay(123);
writel_relaxed(val, wdt->reg_base + field);
wdt->last_ping = jiffies;
}
static int sama5d4_wdt_start(struct watchdog_device *wdd)
{
struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
wdt->mr &= ~AT91_WDT_WDDIS;
wdt_write(wdt, AT91_WDT_MR, wdt->mr);
return 0;
}
static int sama5d4_wdt_stop(struct watchdog_device *wdd)
{
struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
wdt->mr |= AT91_WDT_WDDIS;