Commits
Geert Uytterhoeven committed 435dce2da21
soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7 ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5. Automatically enable support code to mitigate the erratum when compiling a kernel for any of the affected Renesas SoCs: - R-Mobile APE6: r0p2, - RZ/G1E: r0p5, - RZ/G1C: r0p5, - R-Car H2: r0p3, - R-Car E2: r0p5, - RZ/N1: r0p5. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>