Commits
Zidan Wang committed 583b9f7b094
ASoC: fsl-sai: set xCR4/xCR5/xMR for SAI master mode For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4), RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync error sometimes. Signed-off-by: Zidan Wang <zidan.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> (cherry picked from commit 51659ca069ce5bdf20675a7967a39ef8419e87f2)