Source
602
602
};
603
603
604
604
#if IS_ENABLED(CONFIG_PATA_MARVELL)
605
605
static int marvell_enable;
606
606
#else
607
607
static int marvell_enable = 1;
608
608
#endif
609
609
module_param(marvell_enable, int, 0644);
610
610
MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
611
611
612
-
static int mobile_lpm_policy = CONFIG_SATA_MOBILE_LPM_POLICY;
612
+
static int mobile_lpm_policy = -1;
613
613
module_param(mobile_lpm_policy, int, 0644);
614
614
MODULE_PARM_DESC(mobile_lpm_policy, "Default LPM policy for mobile chipsets");
615
615
616
616
static void ahci_pci_save_initial_config(struct pci_dev *pdev,
617
617
struct ahci_host_priv *hpriv)
618
618
{
619
619
if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) {
620
620
dev_info(&pdev->dev, "JMB361 has only one port\n");
621
621
hpriv->force_port_map = 1;
622
622
}
1543
1543
/*
1544
1544
* If the host is not capable of supporting per-port vectors, fall
1545
1545
* back to single MSI before finally attempting single MSI-X.
1546
1546
*/
1547
1547
nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1548
1548
if (nvec == 1)
1549
1549
return nvec;
1550
1550
return pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX);
1551
1551
}
1552
1552
1553
+
static void ahci_update_initial_lpm_policy(struct ata_port *ap,
1554
+
struct ahci_host_priv *hpriv)
1555
+
{
1556
+
int policy = CONFIG_SATA_MOBILE_LPM_POLICY;
1557
+
1558
+
1559
+
/* Ignore processing for non mobile platforms */
1560
+
if (!(hpriv->flags & AHCI_HFLAG_IS_MOBILE))
1561
+
return;
1562
+
1563
+
/* user modified policy via module param */
1564
+
if (mobile_lpm_policy != -1) {
1565
+
policy = mobile_lpm_policy;
1566
+
goto update_policy;
1567
+
}
1568
+
1569
+
#ifdef CONFIG_ACPI
1570
+
if (policy > ATA_LPM_MED_POWER &&
1571
+
(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) {
1572
+
if (hpriv->cap & HOST_CAP_PART)
1573
+
policy = ATA_LPM_MIN_POWER_WITH_PARTIAL;
1574
+
else if (hpriv->cap & HOST_CAP_SSC)
1575
+
policy = ATA_LPM_MIN_POWER;
1576
+
}
1577
+
#endif
1578
+
1579
+
update_policy:
1580
+
if (policy >= ATA_LPM_UNKNOWN && policy <= ATA_LPM_MIN_POWER)
1581
+
ap->target_lpm_policy = policy;
1582
+
}
1583
+
1553
1584
static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1554
1585
{
1555
1586
unsigned int board_id = ent->driver_data;
1556
1587
struct ata_port_info pi = ahci_port_info[board_id];
1557
1588
const struct ata_port_info *ppi[] = { &pi, NULL };
1558
1589
struct device *dev = &pdev->dev;
1559
1590
struct ahci_host_priv *hpriv;
1560
1591
struct ata_host *host;
1561
1592
int n_ports, i, rc;
1562
1593
int ahci_pci_bar = AHCI_PCI_BAR_STANDARD;
1740
1771
struct ata_port *ap = host->ports[i];
1741
1772
1742
1773
ata_port_pbar_desc(ap, ahci_pci_bar, -1, "abar");
1743
1774
ata_port_pbar_desc(ap, ahci_pci_bar,
1744
1775
0x100 + ap->port_no * 0x80, "port");
1745
1776
1746
1777
/* set enclosure management message type */
1747
1778
if (ap->flags & ATA_FLAG_EM)
1748
1779
ap->em_message_type = hpriv->em_msg_type;
1749
1780
1750
-
if ((hpriv->flags & AHCI_HFLAG_IS_MOBILE) &&
1751
-
mobile_lpm_policy >= ATA_LPM_UNKNOWN &&
1752
-
mobile_lpm_policy <= ATA_LPM_MIN_POWER)
1753
-
ap->target_lpm_policy = mobile_lpm_policy;
1781
+
ahci_update_initial_lpm_policy(ap, hpriv);
1754
1782
1755
1783
/* disabled/not-implemented port */
1756
1784
if (!(hpriv->port_map & (1 << i)))
1757
1785
ap->ops = &ata_dummy_port_ops;
1758
1786
}
1759
1787
1760
1788
/* apply workaround for ASUS P5W DH Deluxe mainboard */
1761
1789
ahci_p5wdh_workaround(host);
1762
1790
1763
1791
/* apply gtf filter quirk */