Source
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/regs-clock.h>
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#include <plat/cpu.h>
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#include <plat/clock.h>
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#include <plat/cpu-freq-core.h>
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/* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
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static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
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{
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u32 clkdiv = 0;
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if (cfg->divs.h_divisor == 2)
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clkdiv |= S3C2410_CLKDIVN_HDIVN;
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.locktime_m = 150,
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.locktime_u = 150,
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.locktime_bits = 12,
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.need_pll = 1,
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.name = "s3c2410",
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.calc_iotiming = s3c2410_iotiming_calc,
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.set_iotiming = s3c2410_iotiming_set,
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.get_iotiming = s3c2410_iotiming_get,
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.resume_clocks = s3c2410_setup_clocks,
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.set_fvco = s3c2410_set_fvco,
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.set_refresh = s3c2410_cpufreq_setrefresh,
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.set_divs = s3c2410_cpufreq_setdivs,
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.calc_divs = s3c2410_cpufreq_calcdivs,
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.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
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};
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static int s3c2410_cpufreq_add(struct device *dev,