Source
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* Copyright (C) 2015-2016 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/gpio/driver.h>
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#include <linux/platform_device.h>
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#include <linux/bitops.h>
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/* Loongson 1 GPIO Register Definitions */
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#define GPIO_CFG 0x0
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#define GPIO_DIR 0x10
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#define GPIO_DATA 0x20
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#define GPIO_OUTPUT 0x30
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static void __iomem *gpio_reg_base;
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static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
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{
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unsigned long pinmask = gc->pin2mask(gc, offset);
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unsigned long flags;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | pinmask,
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__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | BIT(offset),
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gpio_reg_base + GPIO_CFG);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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return 0;
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}
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static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset)
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{
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unsigned long pinmask = gc->pin2mask(gc, offset);
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unsigned long flags;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~pinmask,
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__raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~BIT(offset),
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gpio_reg_base + GPIO_CFG);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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static int ls1x_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct gpio_chip *gc;
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struct resource *res;
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int ret;